buffer422.hier_info

一个同步422接口控制器的verilog源程序。

address_a[5] => ram_block15a22.PORTAADDR5
address_a[5] => ram_block15a23.PORTAADDR5
address_a[5] => ram_block15a24.PORTAADDR5
address_a[5] => ram_block15a25.PORTAADDR5
address_a[5] => ram_block15a26.PORTAADDR5
address_a[5] => ram_block15a27.PORTAADDR5
address_a[5] => ram_block15a28.PORTAADDR5
address_a[5] => ram_block15a29.PORTAADDR5
address_a[5] => ram_block15a30.PORTAADDR5
address_a[5] => ram_block15a31.PORTAADDR5
address_a[6] => ram_block15a0.PORTAADDR6
address_a[6] => ram_block15a1.PORTAADDR6
address_a[6] => ram_block15a2.PORTAADDR6
address_a[6] => ram_block15a3.PORTAADDR6
address_a[6] => ram_block15a4.PORTAADDR6
address_a[6] => ram_block15a5.PORTAADDR6
address_a[6] => ram_block15a6.PORTAADDR6
address_a[6] => ram_block15a7.PORTAADDR6
address_a[6] => ram_block15a8.PORTAADDR6
address_a[6] => ram_block15a9.PORTAADDR6
address_a[6] => ram_block15a10.PORTAADDR6
address_a[6] => ram_block15a11.PORTAADDR6
address_a[6] => ram_block15a12.PORTAADDR6
address_a[6] => ram_block15a13.PORTAADDR6
address_a[6] => ram_block15a14.PORTAADDR6
address_a[6] => ram_block15a15.PORTAADDR6
address_a[6] => ram_block15a16.PORTAADDR6
address_a[6] => ram_block15a17.PORTAADDR6
address_a[6] => ram_block15a18.PORTAADDR6
address_a[6] => ram_block15a19.PORTAADDR6
address_a[6] => ram_block15a20.PORTAADDR6
address_a[6] => ram_block15a21.PORTAADDR6
address_a[6] => ram_block15a22.PORTAADDR6
address_a[6] => ram_block15a23.PORTAADDR6
address_a[6] => ram_block15a24.PORTAADDR6
address_a[6] => ram_block15a25.PORTAADDR6
address_a[6] => ram_block15a26.PORTAADDR6
address_a[6] => ram_block15a27.PORTAADDR6
address_a[6] => ram_block15a28.PORTAADDR6
address_a[6] => ram_block15a29.PORTAADDR6
address_a[6] => ram_block15a30.PORTAADDR6
address_a[6] => ram_block15a31.PORTAADDR6
address_a[7] => ram_block15a0.PORTAADDR7
address_a[7] => ram_block15a1.PORTAADDR7
address_a[7] => ram_block15a2.PORTAADDR7
address_a[7] => ram_block15a3.PORTAADDR7
address_a[7] => ram_block15a4.PORTAADDR7
address_a[7] => ram_block15a5.PORTAADDR7
address_a[7] => ram_block15a6.PORTAADDR7
address_a[7] => ram_block15a7.PORTAADDR7
address_a[7] => ram_block15a8.PORTAADDR7
address_a[7] => ram_block15a9.PORTAADDR7
address_a[7] => ram_block15a10.PORTAADDR7
address_a[7] => ram_block15a11.PORTAADDR7
address_a[7] => ram_block15a12.PORTAADDR7
address_a[7] => ram_block15a13.PORTAADDR7
address_a[7] => ram_block15a14.PORTAADDR7
address_a[7] => ram_block15a15.PORTAADDR7
address_a[7] => ram_block15a16.PORTAADDR7
address_a[7] => ram_block15a17.PORTAADDR7
address_a[7] => ram_block15a18.PORTAADDR7
address_a[7] => ram_block15a19.PORTAADDR7
address_a[7] => ram_block15a20.PORTAADDR7
address_a[7] => ram_block15a21.PORTAADDR7
address_a[7] => ram_block15a22.PORTAADDR7
address_a[7] => ram_block15a23.PORTAADDR7
address_a[7] => ram_block15a24.PORTAADDR7
address_a[7] => ram_block15a25.PORTAADDR7
address_a[7] => ram_block15a26.PORTAADDR7
address_a[7] => ram_block15a27.PORTAADDR7
address_a[7] => ram_block15a28.PORTAADDR7
address_a[7] => ram_block15a29.PORTAADDR7
address_a[7] => ram_block15a30.PORTAADDR7
address_a[7] => ram_block15a31.PORTAADDR7
address_a[8] => ram_block15a0.PORTAADDR8
address_a[8] => ram_block15a1.PORTAADDR8
address_a[8] => ram_block15a2.PORTAADDR8
address_a[8] => ram_block15a3.PORTAADDR8
address_a[8] => ram_block15a4.PORTAADDR8
address_a[8] => ram_block15a5.PORTAADDR8
address_a[8] => ram_block15a6.PORTAADDR8
address_a[8] => ram_block15a7.PORTAADDR8
address_a[8] => ram_block15a8.PORTAADDR8
address_a[8] => ram_block15a9.PORTAADDR8
address_a[8] => ram_block15a10.PORTAADDR8
address_a[8] => ram_block15a11.PORTAADDR8
address_a[8] => ram_block15a12.PORTAADDR8
address_a[8] => ram_block15a13.PORTAADDR8
address_a[8] => ram_block15a14.PORTAADDR8
address_a[8] => ram_block15a15.PORTAADDR8
address_a[8] => ram_block15a16.PORTAADDR8
address_a[8] => ram_block15a17.PORTAADDR8
address_a[8] => ram_block15a18.PORTAADDR8
address_a[8] => ram_block15a19.PORTAADDR8
address_a[8] => ram_block15a20.PORTAADDR8
address_a[8] => ram_block15a21.PORTAADDR8
address_a[8] => ram_block15a22.PORTAADDR8
address_a[8] => ram_block15a23.PORTAADDR8
address_a[8] => ram_block15a24.PORTAADDR8
address_a[8] => ram_block15a25.PORTAADDR8
address_a[8] => ram_block15a26.PORTAADDR8
address_a[8] => ram_block15a27.PORTAADDR8
address_a[8] => ram_block15a28.PORTAADDR8
address_a[8] => ram_block15a29.PORTAADDR8
address_a[8] => ram_block15a30.PORTAADDR8
address_a[8] => ram_block15a31.PORTAADDR8
address_a[9] => ram_block15a0.PORTAADDR9
address_a[9] => ram_block15a1.PORTAADDR9
address_a[9] => ram_block15a2.PORTAADDR9
address_a[9] => ram_block15a3.PORTAADDR9
address_a[9] => ram_block15a4.PORTAADDR9
address_a[9] => ram_block15a5.PORTAADDR9
address_a[9] => ram_block15a6.PORTAADDR9
address_a[9] => ram_block15a7.PORTAADDR9
address_a[9] => ram_block15a8.PORTAADDR9
address_a[9] => ram_block15a9.PORTAADDR9
address_a[9] => ram_block15a10.PORTAADDR9
address_a[9] => ram_block15a11.PORTAADDR9
address_a[9] => ram_block15a12.PORTAADDR9
address_a[9] => ram_block15a13.PORTAADDR9
address_a[9] => ram_block15a14.PORTAADDR9
address_a[9] => ram_block15a15.PORTAADDR9
address_a[9] => ram_block15a16.PORTAADDR9
address_a[9] => ram_block15a17.PORTAADDR9
address_a[9] => ram_block15a18.PORTAADDR9
address_a[9] => ram_block15a19.PORTAADDR9
address_a[9] => ram_block15a20.PORTAADDR9
address_a[9] => ram_block15a21.PORTAADDR9
address_a[9] => ram_block15a22.PORTAADDR9
address_a[9] => ram_block15a23.PORTAADDR9
address_a[9] => ram_block15a24.PORTAADDR9
address_a[9] => ram_block15a25.PORTAADDR9
address_a[9] => ram_block15a26.PORTAADDR9
address_a[9] => ram_block15a27.PORTAADDR9
address_a[9] => ram_block15a28.PORTAADDR9
address_a[9] => ram_block15a29.PORTAADDR9
address_a[9] => ram_block15a30.PORTAADDR9
address_a[9] => ram_block15a31.PORTAADDR9
address_a[10] => ram_block15a0.PORTAADDR10
address_a[10] => ram_block15a1.PORTAADDR10
address_a[10] => ram_block15a2.PORTAADDR10
address_a[10] => ram_block15a3.PORTAADDR10
address_a[10] => ram_block15a4.PORTAADDR10
address_a[10] => ram_block15a5.PORTAADDR10
address_a[10] => ram_block15a6.PORTAADDR10
address_a[10] => ram_block15a7.PORTAADDR10
address_a[10] => ram_block15a8.PORTAADDR10
address_a[10] => ram_block15a9.PORTAADDR10
address_a[10] => ram_block15a10.PORTAADDR10
address_a[10] => ram_block15a11.PORTAADDR10
address_a[10] => ram_block15a12.PORTAADDR10
address_a[10] => ram_block15a13.PORTAADDR10
address_a[10] => ram_block15a14.PORTAADDR10
address_a[10] => ram_block15a15.PORTAADDR10
address_a[10] => ram_block15a16.PORTAADDR10
address_a[10] => ram_block15a17.PORTAADDR10
address_a[10] => ram_block15a18.PORTAADDR10
address_a[10] => ram_block15a19.PORTAADDR10
address_a[10] => ram_block15a20.PORTAADDR10
address_a[10] => ram_block15a21.PORTAADDR10
address_a[10] => ram_block15a22.PORTAADDR10
address_a[10] => ram_block15a23.PORTAADDR10
address_a[10] => ram_block15a24.PORTAADDR10
address_a[10] => ram_block15a25.PORTAADDR10
address_a[10] => ram_block15a26.PORTAADDR10
address_a[10] => ram_block15a27.PORTAADDR10
address_a[10] => ram_block15a28.PORTAADDR10
address_a[10] => ram_block15a29.PORTAADDR10
address_a[10] => ram_block15a30.PORTAADDR10
address_a[10] => ram_block15a31.PORTAADDR10
address_a[11] => ram_block15a0.PORTAADDR11
address_a[11] => ram_block15a1.PORTAADDR11
address_a[11] => ram_block15a2.PORTAADDR11
address_a[11] => ram_block15a3.PORTAADDR11
address_a[11] => ram_block15a4.PORTAADDR11
address_a[11] => ram_block15a5.PORTAADDR11
address_a[11] => ram_block15a6.PORTAADDR11
address_a[11] => ram_block15a7.PORTAADDR11
address_a[11] => ram_block15a8.PORTAADDR11
address_a[11] => ram_block15a9.PORTAADDR11
address_a[11] => ram_block15a10.PORTAADDR11
address_a[11] => ram_block15a11.PORTAADDR11
address_a[11] => ram_block15a12.PORTAADDR11
address_a[11] => ram_block15a13.PORTAADDR11
address_a[11] => ram_block15a14.PORTAADDR11
address_a[11] => ram_block15a15.PORTAADDR11
address_a[11] => ram_block15a16.PORTAADDR11
address_a[11] => ram_block15a17.PORTAADDR11
address_a[11] => ram_block15a18.PORTAADDR11
address_a[11] => ram_block15a19.PORTAADDR11
address_a[11] => ram_block15a20.PORTAADDR11
address_a[11] => ram_block15a21.PORTAADDR11
address_a[11] => ram_block15a22.PORTAADDR11
address_a[11] => ram_block15a23.PORTAADDR11
address_a[11] => ram_block15a24.PORTAADDR11
address_a[11] => ram_block15a25.PORTAADDR11
address_a[11] => ram_block15a26.PORTAADDR11
address_a[11] => ram_block15a27.PORTAADDR11
address_a[11] => ram_block15a28.PORTAADDR11
address_a[11] => ram_block15a29.PORTAADDR11
address_a[11] => ram_block15a30.PORTAADDR11
address_a[11] => ram_block15a31.PORTAADDR11
address_a[12] => decode_tt6:decode16.data[0]
address_a[13] => decode_tt6:decode16.data[1]
address_a[14] => decode_tt6:decode16.data[2]
address_a[15] => decode_tt6:decode16.data[3]
address_a[16] => decode_tt6:decode16.data[4]
address_b[0] => ram_block15a0.PORTBADDR
address_b[0] => ram_block15a1.PORTBADDR
address_b[0] => ram_block15a2.PORTBADDR
address_b[0] => ram_block15a3.PORTBADDR
address_b[0] => ram_block15a4.PORTBADDR
address_b[0] => ram_block15a5.PORTBADDR
address_b[0] => ram_block15a6.PORTBADDR
address_b[0] => ram_block15a7.PORTBADDR
address_b[0] => ram_block15a8.PORTBADDR
address_b[0] => ram_block15a9.PORTBADDR
address_b[0] => ram_block15a10.PORTBADDR
address_b[0] => ram_block15a11.PORTBADDR
address_b[0] => ram_block15a12.PORTBADDR
address_b[0] => ram_block15a13.PORTBADDR
address_b[0] => ram_block15a14.PORTBADDR
address_b[0] => ram_block15a15.PORTBADDR
address_b[0] => ram_block15a16.PORTBADDR
address_b[0] => ram_block15a17.PORTBADDR
address_b[0] => ram_block15a18.PORTBADDR
address_b[0] => ram_block15a19.PORTBADDR
address_b[0] => ram_block15a20.PORTBADDR
address_b[0] => ram_block15a21.PORTBADDR
address_b[0] => ram_block15a22.PORTBADDR
address_b[0] => ram_block15a23.PORTBADDR
address_b[0] => ram_block15a24.PORTBADDR
address_b[0] => ram_block15a25.PORTBADDR
address_b[0] => ram_block15a26.PORTBADDR
address_b[0] => ram_block15a27.PORTBADDR
address_b[0] => ram_block15a28.PORTBADDR
address_b[0] => ram_block15a29.PORTBADDR
address_b[0] => ram_block15a30.PORTBADDR
address_b[0] => ram_block15a31.PORTBADDR
address_b[1] => ram_block15a0.PORTBADDR1
address_b[1] => ram_block15a1.PORTBADDR1
address_b[1] => ram_block15a2.PORTBADDR1
address_b[1] => ram_block15a3.PORTBADDR1
address_b[1] => ram_block15a4.PORTBADDR1
address_b[1] => ram_block15a5.PORTBADDR1
address_b[1] => ram_block15a6.PORTBADDR1
address_b[1] => ram_block15a7.PORTBADDR1
address_b[1] => ram_block15a8.PORTBADDR1
address_b[1] => ram_block15a9.PORTBADDR1
address_b[1] => ram_block15a10.PORTBADDR1
address_b[1] => ram_block15a11.PORTBADDR1
address_b[1] => ram_block15a12.PORTBADDR1
address_b[1] => ram_block15a13.PORTBADDR1
address_b[1] => ram_block15a14.PORTBADDR1
address_b[1] => ram_block15a15.PORTBADDR1
address_b[1] => ram_block15a16.PORTBADDR1
address_b[1] => ram_block15a17.PORTBADDR1
address_b[1] => ram_block15a18.PORTBADDR1
address_b[1] => ram_block15a19.PORTBADDR1
address_b[1] => ram_block15a20.PORTBADDR1
address_b[1] => ram_block15a21.PORTBADDR1
address_b[1] => ram_block15a22.PORTBADDR1
address_b[1] => ram_block15a23.PORTBADDR1
address_b[1] => ram_block15a24.PORTBADDR1
address_b[1] => ram_block15a25.PORTBADDR1
address_b[1] => ram_block15a26.PORTBADDR1
address_b[1] => ram_block15a27.PORTBADDR1
address_b[1] => ram_block15a28.PORTBADDR1
address_b[1] => ram_block15a29.PORTBADDR1
address_b[1] => ram_block15a30.PORTBADDR1
address_b[1] => ram_block15a31.PORTBADDR1
address_b[2] => ram_block15a0.PORTBADDR2
address_b[2] => ram_block15a1.PORTBADDR2
address_b[2] => ram_block15a2.PORTBADDR2
address_b[2] => ram_block15a3.PORTBADDR2
address_b[2] => ram_block15a4.PORTBADDR2
address_b[2] => ram_block15a5.PORTBADDR2
address_b[2] => ram_block15a6.PORTBADDR2
address_b[2] => ram_block15a7.PORTBADDR2
address_b[2] => ram_block15a8.PORTBADDR2
address_b[2] => ram_block15a9.PORTBADDR2
address_b[2] => ram_block15a10.PORTBADDR2
address_b[2] => ram_block15a11.PORTBADDR2
address_b[2] => ram_block15a12.PORTBADDR2
address_b[2] => ram_block15a13.PORTBADDR2
address_b[2] => ram_block15a14.PORTBADDR2
address_b[2] => ram_block15a15.PORTBADDR2
address_b[2] => ram_block15a16.PORTBADDR2
address_b[2] => ram_block15a17.PORTBADDR2
address_b[2] => ram_block15a18.PORTBADDR2
address_b[2] => ram_block15a19.PORTBADDR2
address_b[2] => ram_block15a20.PORTBADDR2
address_b[2] => ram_block15a21.PORTBADDR2
address_b[2] => ram_block15a22.PORTBADDR2
address_b[2] => ram_block15a23.PORTBADDR2
address_b[2] => ram_block15a24.PORTBADDR2
address_b[2] => ram_block15a25.PORTBADDR2
address_b[2] => ram_block15a26.PORTBADDR2
address_b[2] => ram_block15a27.PORTBADDR2
address_b[2] => ram_block15a28.PORTBADDR2
address_b[2] => ram_block15a29.PORTBADDR2
address_b[2] => ram_block15a30.PORTBADDR2
address_b[2] => ram_block15a31.PORTBADDR2
address_b[3] => ram_block15a0.PORTBADDR3
address_b[3] => ram_block15a1.PORTBADDR3
address_b[3] => ram_block15a2.PORTBADDR3
address_b[3] => ram_block15a3.PORTBADDR3
address_b[3] => ram_block15a4.PORTBADDR3
address_b[3] => ram_block15a5.PORTBADDR3
address_b[3] => ram_block15a6.PORTBADDR3
address_b[3] => ram_block15a7.PORTBADDR3
address_b[3] => ram_block15a8.PORTBADDR3
address_b[3] => ram_block15a9.PORTBADDR3
address_b[3] => ram_block15a10.PORTBADDR3
address_b[3] => ram_block15a11.PORTBADDR3
address_b[3] => ram_block15a12.PORTBADDR3
address_b[3] => ram_block15a13.PORTBADDR3
address_b[3] => ram_block15a14.PORTBADDR3
address_b[3] => ram_block15a15.PORTBADDR3
address_b[3] => ram_block15a16.PORTBADDR3
address_b[3] => ram_block15a17.PORTBADDR3
address_b[3] => ram_block15a18.PORTBADDR3
address_b[3] => ram_block15a19.PORTBADDR3
address_b[3] => ram_block15a20.PORTBADDR3
address_b[3] => ram_block15a21.PORTBADDR3
address_b[3] => ram_block15a22.PORTBADDR3
address_b[3] => ram_block15a23.PORTBADDR3
address_b[3] => ram_block15a24.PORTBADDR3
address_b[3] => ram_block15a25.PORTBADDR3
address_b[3] => ram_block15a26.PORTBADDR3
address_b[3] => ram_block15a27.PORTBADDR3
address_b[3] => ram_block15a28.PORTBADDR3
address_b[3] => ram_block15a29.PORTBADDR3
address_b[3] => ram_block15a30.PORTBADDR3
address_b[3] => ram_block15a31.PORTBADDR3
address_b[4] => ram_block15a0.PORTBADDR4