mux_6o7.tdf

一个同步422接口控制器的verilog源程序。

--lpm_mux DEVICE_FAMILY="Cyclone" LPM_SIZE=32 LPM_WIDTH=1 LPM_WIDTHS=5 data result sel
--VERSION_BEGIN 6.0 cbx_lpm_mux 2006:01:09:11:16:16:SJ cbx_mgl 2006:04:14:11:14:36:SJ  VERSION_END


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--  applicable agreement for further details.



--synthesis_resources = lut 21 
SUBDESIGN mux_6o7
( 
	data[31..0]	:	input;
	result[0..0]	:	output;
	sel[4..0]	:	input;
) 
VARIABLE 
	result_node[0..0]	: WIRE;
	sel_ffs_wire[9..0]	: WIRE;
	sel_node[4..0]	: WIRE;
	w_data1071w[3..0]	: WIRE;
	w_data1072w[3..0]	: WIRE;
	w_data1073w[3..0]	: WIRE;
	w_data1074w[3..0]	: WIRE;
	w_data856w[31..0]	: WIRE;
	w_data957w[15..0]	: WIRE;
	w_data958w[15..0]	: WIRE;
	w_data968w[3..0]	: WIRE;
	w_data969w[3..0]	: WIRE;
	w_data970w[3..0]	: WIRE;
	w_data971w[3..0]	: WIRE;
	w_result1000w	: WIRE;
	w_result1017w	: WIRE;
	w_result1034w	: WIRE;
	w_result1050w	: WIRE;
	w_result1067w	: WIRE;
	w_result1068w	: WIRE;
	w_result1069w	: WIRE;
	w_result1070w	: WIRE;
	w_result1081w	: WIRE;
	w_result1102w	: WIRE;
	w_result1119w	: WIRE;
	w_result1136w	: WIRE;
	w_result1152w	: WIRE;
	w_result955w	: WIRE;
	w_result956w	: WIRE;
	w_result964w	: WIRE;
	w_result965w	: WIRE;
	w_result966w	: WIRE;
	w_result967w	: WIRE;
	w_result979w	: WIRE;
	w_sel1075w[1..0]	: WIRE;
	w_sel959w[3..0]	: WIRE;
	w_sel972w[1..0]	: WIRE;

BEGIN 
	result[] = result_node[];
	result_node[] = ( ((sel_node[4..4] & w_result956w) # ((! sel_node[4..4]) & w_result955w)));
	sel_ffs_wire[] = ( sel_ffs_wire[4..0], sel[4..0]);
	sel_node[] = ( sel_ffs_wire[9..9], sel_ffs_wire[3..2], sel[1..0]);
	w_data1071w[3..0] = w_data958w[3..0];
	w_data1072w[3..0] = w_data958w[7..4];
	w_data1073w[3..0] = w_data958w[11..8];
	w_data1074w[3..0] = w_data958w[15..12];
	w_data856w[] = ( data[31..0]);
	w_data957w[15..0] = w_data856w[15..0];
	w_data958w[15..0] = w_data856w[31..16];
	w_data968w[3..0] = w_data957w[3..0];
	w_data969w[3..0] = w_data957w[7..4];
	w_data970w[3..0] = w_data957w[11..8];
	w_data971w[3..0] = w_data957w[15..12];
	w_result1000w = (((w_data969w[0..0] & (! w_sel972w[1..1])) & (! w_sel972w[0..0])) # (w_sel972w[1..1] & (w_sel972w[0..0] # w_data969w[2..2])));
	w_result1017w = (((w_data970w[0..0] & (! w_sel972w[1..1])) & (! w_sel972w[0..0])) # (w_sel972w[1..1] & (w_sel972w[0..0] # w_data970w[2..2])));
	w_result1034w = (((w_data971w[0..0] & (! w_sel972w[1..1])) & (! w_sel972w[0..0])) # (w_sel972w[1..1] & (w_sel972w[0..0] # w_data971w[2..2])));
	w_result1050w = (((w_result964w & (! w_sel959w[3..3])) & (! w_sel959w[2..2])) # (w_sel959w[3..3] & (w_sel959w[2..2] # w_result966w)));
	w_result1067w = (((w_data1071w[1..1] & w_sel1075w[0..0]) & (! w_result1081w)) # (w_result1081w & (w_data1071w[3..3] # (! w_sel1075w[0..0]))));
	w_result1068w = (((w_data1072w[1..1] & w_sel1075w[0..0]) & (! w_result1102w)) # (w_result1102w & (w_data1072w[3..3] # (! w_sel1075w[0..0]))));
	w_result1069w = (((w_data1073w[1..1] & w_sel1075w[0..0]) & (! w_result1119w)) # (w_result1119w & (w_data1073w[3..3] # (! w_sel1075w[0..0]))));
	w_result1070w = (((w_data1074w[1..1] & w_sel1075w[0..0]) & (! w_result1136w)) # (w_result1136w & (w_data1074w[3..3] # (! w_sel1075w[0..0]))));
	w_result1081w = (((w_data1071w[0..0] & (! w_sel1075w[1..1])) & (! w_sel1075w[0..0])) # (w_sel1075w[1..1] & (w_sel1075w[0..0] # w_data1071w[2..2])));
	w_result1102w = (((w_data1072w[0..0] & (! w_sel1075w[1..1])) & (! w_sel1075w[0..0])) # (w_sel1075w[1..1] & (w_sel1075w[0..0] # w_data1072w[2..2])));
	w_result1119w = (((w_data1073w[0..0] & (! w_sel1075w[1..1])) & (! w_sel1075w[0..0])) # (w_sel1075w[1..1] & (w_sel1075w[0..0] # w_data1073w[2..2])));
	w_result1136w = (((w_data1074w[0..0] & (! w_sel1075w[1..1])) & (! w_sel1075w[0..0])) # (w_sel1075w[1..1] & (w_sel1075w[0..0] # w_data1074w[2..2])));
	w_result1152w = (((w_result1067w & (! w_sel959w[3..3])) & (! w_sel959w[2..2])) # (w_sel959w[3..3] & (w_sel959w[2..2] # w_result1069w)));
	w_result955w = (((w_result965w & w_sel959w[2..2]) & (! w_result1050w)) # (w_result1050w & (w_result967w # (! w_sel959w[2..2]))));
	w_result956w = (((w_result1068w & w_sel959w[2..2]) & (! w_result1152w)) # (w_result1152w & (w_result1070w # (! w_sel959w[2..2]))));
	w_result964w = (((w_data968w[1..1] & w_sel972w[0..0]) & (! w_result979w)) # (w_result979w & (w_data968w[3..3] # (! w_sel972w[0..0]))));
	w_result965w = (((w_data969w[1..1] & w_sel972w[0..0]) & (! w_result1000w)) # (w_result1000w & (w_data969w[3..3] # (! w_sel972w[0..0]))));
	w_result966w = (((w_data970w[1..1] & w_sel972w[0..0]) & (! w_result1017w)) # (w_result1017w & (w_data970w[3..3] # (! w_sel972w[0..0]))));
	w_result967w = (((w_data971w[1..1] & w_sel972w[0..0]) & (! w_result1034w)) # (w_result1034w & (w_data971w[3..3] # (! w_sel972w[0..0]))));
	w_result979w = (((w_data968w[0..0] & (! w_sel972w[1..1])) & (! w_sel972w[0..0])) # (w_sel972w[1..1] & (w_sel972w[0..0] # w_data968w[2..2])));
	w_sel1075w[1..0] = w_sel959w[1..0];
	w_sel959w[3..0] = sel_node[3..0];
	w_sel972w[1..0] = w_sel959w[1..0];
END;
--VALID FILE