buffer422.map.summary

一个同步422接口控制器的verilog源程序。

Analysis & Synthesis Status : Successful - Fri May 18 17:18:25 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : buffer422
Top-level Entity Name : buffer422
Family : Cyclone
Total logic elements : 331
Total pins : 7
Total virtual pins : 0
Total memory bits : 131,072
Total PLLs : 0