buffer422.map.eqn

一个同步422接口控制器的verilog源程序。

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--B1_clkdiv is buff_control:inst|clkdiv
--operation mode is normal

B1_clkdiv_lut_out = !B1_clkdiv;
B1_clkdiv = DFFEAS(B1_clkdiv_lut_out, clk, rst, , B1L201, , , , );


--B1_dout is buff_control:inst|dout
--operation mode is normal

B1_dout_lut_out = B1_infoe_sel & (!B1_infoe[31]) # !B1_infoe_sel & B1L03;
B1_dout = DFFEAS(B1_dout_lut_out, B1_clkdiv, rst, , , B1L89, , , B1_infos_sel);


--H1L1 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~460
--operation mode is normal

H1L1_carry_eqn = H1L3;
H1L1 = F1_dffe8a[16] $ F1_dffe5a[16] $ H1L1_carry_eqn;


--H1L2 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~465
--operation mode is arithmetic

H1L2_carry_eqn = H1L5;
H1L2 = F1_dffe8a[15] $ F1_dffe5a[15] $ !H1L2_carry_eqn;

--H1L3 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~467
--operation mode is arithmetic

H1L3 = CARRY(F1_dffe8a[15] & F1_dffe5a[15] & !H1L5 # !F1_dffe8a[15] & (F1_dffe5a[15] # !H1L5));


--H1L4 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~470
--operation mode is arithmetic

H1L4_carry_eqn = H1L7;
H1L4 = F1_dffe8a[14] $ F1_dffe5a[14] $ H1L4_carry_eqn;

--H1L5 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~472
--operation mode is arithmetic

H1L5 = CARRY(F1_dffe8a[14] & (!H1L7 # !F1_dffe5a[14]) # !F1_dffe8a[14] & !F1_dffe5a[14] & !H1L7);


--H1L6 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~475
--operation mode is arithmetic

H1L6_carry_eqn = H1L9;
H1L6 = F1_dffe8a[13] $ F1_dffe5a[13] $ !H1L6_carry_eqn;

--H1L7 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~477
--operation mode is arithmetic

H1L7 = CARRY(F1_dffe8a[13] & F1_dffe5a[13] & !H1L9 # !F1_dffe8a[13] & (F1_dffe5a[13] # !H1L9));


--H1L8 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~480
--operation mode is arithmetic

H1L8_carry_eqn = H1L11;
H1L8 = F1_dffe8a[12] $ F1_dffe5a[12] $ H1L8_carry_eqn;

--H1L9 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~482
--operation mode is arithmetic

H1L9 = CARRY(F1_dffe8a[12] & (!H1L11 # !F1_dffe5a[12]) # !F1_dffe8a[12] & !F1_dffe5a[12] & !H1L11);


--H1L01 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~485
--operation mode is arithmetic

H1L01_carry_eqn = H1L31;
H1L01 = F1_dffe8a[11] $ F1_dffe5a[11] $ !H1L01_carry_eqn;

--H1L11 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~487
--operation mode is arithmetic

H1L11 = CARRY(F1_dffe8a[11] & F1_dffe5a[11] & !H1L31 # !F1_dffe8a[11] & (F1_dffe5a[11] # !H1L31));


--H1L21 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~490
--operation mode is arithmetic

H1L21_carry_eqn = H1L51;
H1L21 = F1_dffe8a[10] $ F1_dffe5a[10] $ H1L21_carry_eqn;

--H1L31 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~492
--operation mode is arithmetic

H1L31 = CARRY(F1_dffe8a[10] & (!H1L51 # !F1_dffe5a[10]) # !F1_dffe8a[10] & !F1_dffe5a[10] & !H1L51);


--H1L41 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~495
--operation mode is arithmetic

H1L41_carry_eqn = H1L71;
H1L41 = F1_dffe8a[9] $ F1_dffe5a[9] $ !H1L41_carry_eqn;

--H1L51 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~497
--operation mode is arithmetic

H1L51 = CARRY(F1_dffe8a[9] & F1_dffe5a[9] & !H1L71 # !F1_dffe8a[9] & (F1_dffe5a[9] # !H1L71));


--H1L61 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~500
--operation mode is arithmetic

H1L61_carry_eqn = H1L91;
H1L61 = F1_dffe8a[8] $ F1_dffe5a[8] $ H1L61_carry_eqn;

--H1L71 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~502
--operation mode is arithmetic

H1L71 = CARRY(F1_dffe8a[8] & (!H1L91 # !F1_dffe5a[8]) # !F1_dffe8a[8] & !F1_dffe5a[8] & !H1L91);


--H1L81 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~505
--operation mode is arithmetic

H1L81_carry_eqn = H1L12;
H1L81 = F1_dffe8a[7] $ F1_dffe5a[7] $ !H1L81_carry_eqn;

--H1L91 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~507
--operation mode is arithmetic

H1L91 = CARRY(F1_dffe8a[7] & F1_dffe5a[7] & !H1L12 # !F1_dffe8a[7] & (F1_dffe5a[7] # !H1L12));


--H1L02 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~510
--operation mode is arithmetic

H1L02_carry_eqn = H1L32;
H1L02 = F1_dffe8a[6] $ F1_dffe5a[6] $ H1L02_carry_eqn;

--H1L12 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~512
--operation mode is arithmetic

H1L12 = CARRY(F1_dffe8a[6] & (!H1L32 # !F1_dffe5a[6]) # !F1_dffe8a[6] & !F1_dffe5a[6] & !H1L32);


--H1L22 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~515
--operation mode is arithmetic

H1L22_carry_eqn = H1L52;
H1L22 = F1_dffe8a[5] $ F1_dffe5a[5] $ !H1L22_carry_eqn;

--H1L32 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~517
--operation mode is arithmetic

H1L32 = CARRY(F1_dffe8a[5] & F1_dffe5a[5] & !H1L52 # !F1_dffe8a[5] & (F1_dffe5a[5] # !H1L52));


--H1L42 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~520
--operation mode is arithmetic