sub_tdm.flow.rpt
来自「pci pci转local bus总线的应用」· RPT 代码 · 共 1,587 行 · 第 1/5 页
RPT
1,587 行
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:14 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:47 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:47 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:51 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:25 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:01 ;
; Analysis & Synthesis ; 00:00:13 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:47 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:20 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:01 ;
; Analysis & Synthesis ; 00:00:01 ;
; Analysis & Synthesis ; 00:00:02 ;
; Analysis & Synthesis ; 00:00:45 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:26 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:50 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:24 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:03 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:24 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:47 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:44 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:15 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:45 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:17 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:23 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:15 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:46 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:21 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:49 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:23 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:47 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:48 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:48 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:48 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:23 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:52 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:03 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:48 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:51 ;
; Analysis & Synthesis ; 00:00:14 ;
; Partition Merge ; 00:00:01 ;
; Fitter ; 00:00:22 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:02 ;
; EDA Netlist Writer ; 00:00:04 ;
; Analysis & Synthesis ; 00:00:49 ;
; Partition Merge ; 00:00:02 ;
; Fitter ; 00:00:23 ;
; Assembler ; 00:00:02 ;
; Timing Analyzer ; 00:00:03 ;
; EDA Netlist Writer ; 00:00:04 ;
; Total ; 04:51:28 ;
+----------------------+--------------+
------------
; Flow Log ;
------------
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files=off sub_tdm -c sub_tdm
quartus_map --read_settings_files=on --write_settings_files
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