reset_gen.v

pci pci转local bus总线的应用

module RESET_GEN(   
clk33m,             
reset_n,            
reset_reg,          
reset_8245,         
reset_5248,         
reset_5650,         
reset_5464, 
reset_rs232,
reset_zl,        
reset_sof,          
dog_clear,          
dog_value,          
dog_cnt,            
clk1hz,             
clk2hz,             
clk4hz,             
clk8hz,             
clk16hz,
clk16khz
);

input clk33m;
input reset_n;
input [6:0] reset_reg;   //{reset_all,reset_rs232,reset_5248,reset_5464,reset_5650,reset_8245}
input dog_clear;
input [7:0] dog_value;
output[7:0] dog_cnt;
reg   [7:0] dog_cnt;
reg    dog_rst;

output reset_8245;
output reset_5464;
output reset_5650;
output reset_5248;
output reset_rs232;
output reset_zl;
output reset_sof;

assign reset_zl    = reset_n & reset_reg[5];
assign reset_rs232 = reset_n & reset_reg[4];
assign reset_5248  = reset_n & reset_reg[3];
assign reset_5464  = reset_n & reset_reg[2];
assign reset_5650  = reset_n & reset_reg[1];
assign reset_8245  = reset_n & reset_reg[0];
assign reset_sof   = dog_rst & reset_reg[6];

///////////////////////////////////////////////////
output clk1hz;
output clk2hz;
output clk4hz;
output clk8hz;
output clk16hz;
output clk16khz;
wire   clk1khz;
reg [24:0] count;
assign clk1hz = count[24];
assign clk2hz = count[23];
assign clk4hz = count[22];
assign clk8hz = count[21];
assign clk16hz = count[20];
assign clk1khz = count[14];
assign clk16khz = count[10];

always @(posedge clk33m)
begin
	count <= count + 1;
end
///////////////////////////////////////////////////

///////////////////////////////////////////////////
wire dog_reset;
assign dog_reset = dog_clear & reset_n;

always @(posedge clk1hz or negedge dog_reset)
begin
if(!dog_reset)
	begin
	dog_rst <= 1'b1;
	dog_cnt <= 8'h0;
	end
else
	begin
	dog_cnt <= (dog_value==8'h0)? 8'h0 : dog_cnt + 1;
	dog_rst <= ((dog_cnt!=8'h0) && (dog_cnt == dog_value))? 1'b0 : 1'b1;
	end
end
//////////////////////////////////////////////////


endmodule