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📄 sub_tdm.fit.eqn

📁 pci pci转local bus总线的应用
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--G1_WR_COUNT[0] is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[0] at LC_X21_Y14_N1
--operation mode is arithmetic

G1_WR_COUNT[0]_lut_out = !G1_WR_COUNT[0];
G1_WR_COUNT[0] = DFFEAS(G1_WR_COUNT[0]_lut_out, GLOBAL(G1_CLK_COUNT[7]), GLOBAL(reset_n), , , , , !G1_IIC_WR_STATE.WRITE_READ, );

--G1L75 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[0]~245 at LC_X21_Y14_N1
--operation mode is arithmetic

G1L75_cout_0 = G1_WR_COUNT[0];
G1L75 = CARRY(G1L75_cout_0);

--G1L85 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_COUNT[0]~245COUT1_249 at LC_X21_Y14_N1
--operation mode is arithmetic

G1L85_cout_1 = G1_WR_COUNT[0];
G1L85 = CARRY(G1L85_cout_1);


--G1_WR_START is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_START at LC_X19_Y12_N6
--operation mode is normal

G1_WR_START_lut_out = G1_WR_START_STATE.00 # E1_IIC_ACCESS_INIT;
G1_WR_START = DFFEAS(G1_WR_START_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );


--G1_CLK_COUNT[4] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[4] at LC_X8_Y10_N4
--operation mode is arithmetic

G1_CLK_COUNT[4]_lut_out = G1_CLK_COUNT[4] $ !G1L21;
G1_CLK_COUNT[4] = DFFEAS(G1_CLK_COUNT[4]_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );

--G1L51 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[4]~136 at LC_X8_Y10_N4
--operation mode is arithmetic

G1L51 = G1L61;


--D1_count[18] is RESET_GEN:RESET_GEN|count[18] at LC_X9_Y10_N1
--operation mode is arithmetic

D1_count[18]_carry_eqn = (!D1L84 & D1L05) # (D1L84 & D1L15);
D1_count[18]_lut_out = D1_count[18] $ (!D1_count[18]_carry_eqn);
D1_count[18] = DFFEAS(D1_count[18]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L35 is RESET_GEN:RESET_GEN|count[18]~200 at LC_X9_Y10_N1
--operation mode is arithmetic

D1L35_cout_0 = D1_count[18] & (!D1L05);
D1L35 = CARRY(D1L35_cout_0);

--D1L45 is RESET_GEN:RESET_GEN|count[18]~200COUT1_290 at LC_X9_Y10_N1
--operation mode is arithmetic

D1L45_cout_1 = D1_count[18] & (!D1L15);
D1L45 = CARRY(D1L45_cout_1);


--E1_IIC_ACCESS_INIT is fpga_misc:misc|IIC_ACCESS_INIT at LC_X16_Y12_N4
--operation mode is normal

E1_IIC_ACCESS_INIT_lut_out = E1_IIC_ACCESS_INIT # !M1_lt_dxfrn & M1L302 & !E1L933;
E1_IIC_ACCESS_INIT = DFFEAS(E1_IIC_ACCESS_INIT_lut_out, GLOBAL(pci_clk), GLOBAL(reset_n), , , , , !E1_cstate.WRITE, );


--G1_CLK_COUNT[3] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[3] at LC_X8_Y10_N3
--operation mode is arithmetic

G1_CLK_COUNT[3]_lut_out = G1_CLK_COUNT[3] $ G1L9;
G1_CLK_COUNT[3] = DFFEAS(G1_CLK_COUNT[3]_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );

--G1L21 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[3]~140 at LC_X8_Y10_N3
--operation mode is arithmetic

G1L21_cout_0 = !G1L9 # !G1_CLK_COUNT[3];
G1L21 = CARRY(G1L21_cout_0);

--G1L31 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[3]~140COUT1 at LC_X8_Y10_N3
--operation mode is arithmetic

G1L31_cout_1 = !G1L01 # !G1_CLK_COUNT[3];
G1L31 = CARRY(G1L31_cout_1);


--H1_WR_START_STATE.01 is fpga_misc:misc|IIC_SFP:IIC_SFP|WR_START_STATE.01 at LC_X16_Y15_N2
--operation mode is normal

H1_WR_START_STATE.01_lut_out = G1_CLK_COUNT[8] & E1_SFPIIC_ACCESS_INIT & (!H1_WR_START_STATE.00) # !G1_CLK_COUNT[8] & (H1_WR_START_STATE.01 # E1_SFPIIC_ACCESS_INIT & !H1_WR_START_STATE.00);
H1_WR_START_STATE.01 = DFFEAS(H1_WR_START_STATE.01_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );


--D1_count[17] is RESET_GEN:RESET_GEN|count[17] at LC_X9_Y10_N0
--operation mode is arithmetic

D1_count[17]_carry_eqn = D1L84;
D1_count[17]_lut_out = D1_count[17] $ D1_count[17]_carry_eqn;
D1_count[17] = DFFEAS(D1_count[17]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L05 is RESET_GEN:RESET_GEN|count[17]~204 at LC_X9_Y10_N0
--operation mode is arithmetic

D1L05_cout_0 = !D1L84 # !D1_count[17];
D1L05 = CARRY(D1L05_cout_0);

--D1L15 is RESET_GEN:RESET_GEN|count[17]~204COUT1_289 at LC_X9_Y10_N0
--operation mode is arithmetic

D1L15_cout_1 = !D1L84 # !D1_count[17];
D1L15 = CARRY(D1L15_cout_1);


--G1_CLK_COUNT[2] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[2] at LC_X8_Y10_N2
--operation mode is arithmetic

G1_CLK_COUNT[2]_lut_out = G1_CLK_COUNT[2] $ (!G1L6);
G1_CLK_COUNT[2] = DFFEAS(G1_CLK_COUNT[2]_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );

--G1L9 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[2]~144 at LC_X8_Y10_N2
--operation mode is arithmetic

G1L9_cout_0 = G1_CLK_COUNT[2] & (!G1L6);
G1L9 = CARRY(G1L9_cout_0);

--G1L01 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[2]~144COUT1_158 at LC_X8_Y10_N2
--operation mode is arithmetic

G1L01_cout_1 = G1_CLK_COUNT[2] & (!G1L7);
G1L01 = CARRY(G1L01_cout_1);


--D1_count[16] is RESET_GEN:RESET_GEN|count[16] at LC_X9_Y11_N9
--operation mode is arithmetic

D1_count[16]_carry_eqn = (!D1L43 & D1L54) # (D1L43 & D1L64);
D1_count[16]_lut_out = D1_count[16] $ (!D1_count[16]_carry_eqn);
D1_count[16] = DFFEAS(D1_count[16]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L84 is RESET_GEN:RESET_GEN|count[16]~208 at LC_X9_Y11_N9
--operation mode is arithmetic

D1L84 = CARRY(D1_count[16] & (!D1L64));


--C1_ot_cnt[0] is parallel_interface:Parallel_interface|ot_cnt[0] at LC_X19_Y8_N5
--operation mode is normal

C1_ot_cnt[0]_lut_out = C1L302 $ C1_ot_cnt[0];
C1_ot_cnt[0] = DFFEAS(C1_ot_cnt[0]_lut_out, GLOBAL(pci_clk), GLOBAL(reset_n), , C1L612, , , , );


--G1_WR_START_STATE.01 is fpga_misc:misc|IIC_RS232:IIC_RS232|WR_START_STATE.01 at LC_X19_Y12_N5
--operation mode is normal

G1_WR_START_STATE.01_lut_out = E1_IIC_ACCESS_INIT & (!G1_CLK_COUNT[8] & G1_WR_START_STATE.01 # !G1_WR_START_STATE.00) # !E1_IIC_ACCESS_INIT & !G1_CLK_COUNT[8] & (G1_WR_START_STATE.01);
G1_WR_START_STATE.01 = DFFEAS(G1_WR_START_STATE.01_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );


--G1_CLK_COUNT[1] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[1] at LC_X8_Y10_N1
--operation mode is arithmetic

G1_CLK_COUNT[1]_lut_out = G1_CLK_COUNT[1] $ (G1L3);
G1_CLK_COUNT[1] = DFFEAS(G1_CLK_COUNT[1]_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );

--G1L6 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[1]~148 at LC_X8_Y10_N1
--operation mode is arithmetic

G1L6_cout_0 = !G1L3 # !G1_CLK_COUNT[1];
G1L6 = CARRY(G1L6_cout_0);

--G1L7 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[1]~148COUT1_157 at LC_X8_Y10_N1
--operation mode is arithmetic

G1L7_cout_1 = !G1L4 # !G1_CLK_COUNT[1];
G1L7 = CARRY(G1L7_cout_1);


--D1_count[15] is RESET_GEN:RESET_GEN|count[15] at LC_X9_Y11_N8
--operation mode is arithmetic

D1_count[15]_carry_eqn = (!D1L43 & D1L24) # (D1L43 & D1L34);
D1_count[15]_lut_out = D1_count[15] $ D1_count[15]_carry_eqn;
D1_count[15] = DFFEAS(D1_count[15]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L54 is RESET_GEN:RESET_GEN|count[15]~212 at LC_X9_Y11_N8
--operation mode is arithmetic

D1L54_cout_0 = !D1L24 # !D1_count[15];
D1L54 = CARRY(D1L54_cout_0);

--D1L64 is RESET_GEN:RESET_GEN|count[15]~212COUT1_288 at LC_X9_Y11_N8
--operation mode is arithmetic

D1L64_cout_1 = !D1L34 # !D1_count[15];
D1L64 = CARRY(D1L64_cout_1);


--G1_CLK_COUNT[0] is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[0] at LC_X8_Y10_N0
--operation mode is arithmetic

G1_CLK_COUNT[0]_lut_out = !G1_CLK_COUNT[0];
G1_CLK_COUNT[0] = DFFEAS(G1_CLK_COUNT[0]_lut_out, GLOBAL(pci_clk), VCC, , , , , !reset_n, );

--G1L3 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[0]~152 at LC_X8_Y10_N0
--operation mode is arithmetic

G1L3_cout_0 = G1_CLK_COUNT[0];
G1L3 = CARRY(G1L3_cout_0);

--G1L4 is fpga_misc:misc|IIC_RS232:IIC_RS232|CLK_COUNT[0]~152COUT1_156 at LC_X8_Y10_N0
--operation mode is arithmetic

G1L4_cout_1 = G1_CLK_COUNT[0];
G1L4 = CARRY(G1L4_cout_1);


--D1_count[14] is RESET_GEN:RESET_GEN|count[14] at LC_X9_Y11_N7
--operation mode is arithmetic

D1_count[14]_carry_eqn = (!D1L43 & D1L93) # (D1L43 & D1L04);
D1_count[14]_lut_out = D1_count[14] $ (!D1_count[14]_carry_eqn);
D1_count[14] = DFFEAS(D1_count[14]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L24 is RESET_GEN:RESET_GEN|count[14]~216 at LC_X9_Y11_N7
--operation mode is arithmetic

D1L24_cout_0 = D1_count[14] & (!D1L93);
D1L24 = CARRY(D1L24_cout_0);

--D1L34 is RESET_GEN:RESET_GEN|count[14]~216COUT1_287 at LC_X9_Y11_N7
--operation mode is arithmetic

D1L34_cout_1 = D1_count[14] & (!D1L04);
D1L34 = CARRY(D1L34_cout_1);


--D1_count[13] is RESET_GEN:RESET_GEN|count[13] at LC_X9_Y11_N6
--operation mode is arithmetic

D1_count[13]_carry_eqn = (!D1L43 & D1L63) # (D1L43 & D1L73);
D1_count[13]_lut_out = D1_count[13] $ (D1_count[13]_carry_eqn);
D1_count[13] = DFFEAS(D1_count[13]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L93 is RESET_GEN:RESET_GEN|count[13]~220 at LC_X9_Y11_N6
--operation mode is arithmetic

D1L93_cout_0 = !D1L63 # !D1_count[13];
D1L93 = CARRY(D1L93_cout_0);

--D1L04 is RESET_GEN:RESET_GEN|count[13]~220COUT1_286 at LC_X9_Y11_N6
--operation mode is arithmetic

D1L04_cout_1 = !D1L73 # !D1_count[13];
D1L04 = CARRY(D1L04_cout_1);


--D1_count[12] is RESET_GEN:RESET_GEN|count[12] at LC_X9_Y11_N5
--operation mode is arithmetic

D1_count[12]_carry_eqn = D1L43;
D1_count[12]_lut_out = D1_count[12] $ !D1_count[12]_carry_eqn;
D1_count[12] = DFFEAS(D1_count[12]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L63 is RESET_GEN:RESET_GEN|count[12]~224 at LC_X9_Y11_N5
--operation mode is arithmetic

D1L63_cout_0 = D1_count[12] & !D1L43;
D1L63 = CARRY(D1L63_cout_0);

--D1L73 is RESET_GEN:RESET_GEN|count[12]~224COUT1_285 at LC_X9_Y11_N5
--operation mode is arithmetic

D1L73_cout_1 = D1_count[12] & !D1L43;
D1L73 = CARRY(D1L73_cout_1);


--D1_count[11] is RESET_GEN:RESET_GEN|count[11] at LC_X9_Y11_N4
--operation mode is arithmetic

D1_count[11]_carry_eqn = (!D1L02 & D1L13) # (D1L02 & D1L23);
D1_count[11]_lut_out = D1_count[11] $ D1_count[11]_carry_eqn;
D1_count[11] = DFFEAS(D1_count[11]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L43 is RESET_GEN:RESET_GEN|count[11]~228 at LC_X9_Y11_N4
--operation mode is arithmetic

D1L43 = CARRY(!D1L23 # !D1_count[11]);


--D1_count[10] is RESET_GEN:RESET_GEN|count[10] at LC_X9_Y11_N3
--operation mode is arithmetic

D1_count[10]_carry_eqn = (!D1L02 & D1L82) # (D1L02 & D1L92);
D1_count[10]_lut_out = D1_count[10] $ !D1_count[10]_carry_eqn;
D1_count[10] = DFFEAS(D1_count[10]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L13 is RESET_GEN:RESET_GEN|count[10]~232 at LC_X9_Y11_N3
--operation mode is arithmetic

D1L13_cout_0 = D1_count[10] & !D1L82;
D1L13 = CARRY(D1L13_cout_0);

--D1L23 is RESET_GEN:RESET_GEN|count[10]~232COUT1_284 at LC_X9_Y11_N3
--operation mode is arithmetic

D1L23_cout_1 = D1_count[10] & !D1L92;
D1L23 = CARRY(D1L23_cout_1);


--D1_count[9] is RESET_GEN:RESET_GEN|count[9] at LC_X9_Y11_N2
--operation mode is arithmetic

D1_count[9]_carry_eqn = (!D1L02 & D1L52) # (D1L02 & D1L62);
D1_count[9]_lut_out = D1_count[9] $ (D1_count[9]_carry_eqn);
D1_count[9] = DFFEAS(D1_count[9]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L82 is RESET_GEN:RESET_GEN|count[9]~236 at LC_X9_Y11_N2
--operation mode is arithmetic

D1L82_cout_0 = !D1L52 # !D1_count[9];
D1L82 = CARRY(D1L82_cout_0);

--D1L92 is RESET_GEN:RESET_GEN|count[9]~236COUT1_283 at LC_X9_Y11_N2
--operation mode is arithmetic

D1L92_cout_1 = !D1L62 # !D1_count[9];
D1L92 = CARRY(D1L92_cout_1);


--G1_W_DATA_BUF[31] is fpga_misc:misc|IIC_RS232:IIC_RS232|W_DATA_BUF[31] at LC_X11_Y14_N5
--operation mode is normal

G1_W_DATA_BUF[31]_lut_out = E1_IIC_DATA_IN[15] # !E1_IIC_W_R;
G1_W_DATA_BUF[31] = DFFEAS(G1_W_DATA_BUF[31]_lut_out, GLOBAL(G1_CLK_COUNT[7]), GLOBAL(reset_n), , G1L79, G1_W_DATA_BUF[30], , , G1_IIC_WR_STATE.WRITE_READ);


--D1_count[8] is RESET_GEN:RESET_GEN|count[8] at LC_X9_Y11_N1
--operation mode is arithmetic

D1_count[8]_carry_eqn = (!D1L02 & D1L22) # (D1L02 & D1L32);
D1_count[8]_lut_out = D1_count[8] $ (!D1_count[8]_carry_eqn);
D1_count[8] = DFFEAS(D1_count[8]_lut_out, GLOBAL(pci_clk), VCC, , , , , , );

--D1L52 is RESET_GEN:RESET_GEN|count[8]~240 at LC_X9_Y11_N1
--operation mode is arithmetic

D1L52_cout_0 = D1_count[8] & (!D1L22);
D1L52 = CARRY(D1L52_cout_0);

--D1L62 is RESET_GEN:RESET_GEN|count[8]~240COUT1_282 at LC_X9_Y11_N1
--operation mode is arithmetic

D1L62_cout_1 = D1_count[8] & (!D1L32);
D1L62 = CARRY(D1L62_cout_1);


--D1_count[7] is RESET_GEN:RESET_GEN|count[7] at LC_X9_Y11_N0
--operation mode is arithmetic

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