golomb2.vhd

golomb编码

--copyright at tangyao,OPM. V3.0
--2005.12.21
--main golomb encode part,data output in 2cycles in form of 23bit.
--first cycle output "0" bit and the width of it,
--second cycle output one '1' and other k bits or errval-1 bits and the width.
--when the data is not 23 bits width,msb is active.

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity golomb2 is
	generic(
		NEAR		: integer:=0;
		qbpp		: integer:=8;
		li			: integer:=23 --limit-qbpp-1
			);
	port (
		reset				: in	std_logic;
		clk,clkx8,clkx10	: in	std_logic; 
		k					: in	std_logic_vector(3 downto 0);
		errval				: in	std_logic_vector(7 downto 0);
		Nq					: in	std_logic_vector(6 downto 0);
		Bq					: in	std_logic_vector(7 downto 0);
		wen					: in	std_logic;
		oen					: out	std_logic;
		dataout     		: out   std_logic_vector(22 downto 0);
		width				: out	integer range 0 to 23
    	  );
end golomb2;

architecture RTL of golomb2 is

signal wen_in,rdy		: std_logic;
signal n				: integer range 0 to 255;
signal b				: integer range -128 to 127;
signal kin				: integer range 0 to 8;
signal count			: integer range 0 to 7;
signal err,errval_in	: std_logic_vector(7 downto 0);
signal merrval			: std_logic_vector(8 downto 0);
signal merrval_high		: std_logic_vector(7 downto 0);
signal merrval_low		: std_logic_vector(7 downto 0);
signal data_reg			: std_logic_vector(7 downto 0);
signal bq1,nq1			: std_logic_vector(7 downto 0);
signal k2				: std_logic_vector(3 downto 0);
signal js				: integer range 0 to 9;
signal oe1,oe2,oe3,oe4,oe5,oe6,oe7,oe8,oe9	:std_logic;
signal d1,d2,d3,d4,d5,d6,d7,d8,d9			:std_logic_vector(22 downto 0);
signal w1,w2,w3,w4,w5,w6,w7,w8,w9			:integer range 0 to 23;
begin

process(clkx8,reset)
begin
	if reset='0' then
		oe1<='0';oe2<='0';oe3<='0';oe4<='0';oe5<='0';oe6<='0';oe7<='0';oe8<='0';
		d1<=(others=>'0');d2<=(others=>'0');d3<=(others=>'0');d4<=(others=>'0');d5<=(others=>'0');
		d6<=(others=>'0');d7<=(others=>'0');d8<=(others=>'0');
		w1<=0;w2<=0;w3<=0;w4<=0;w5<=0;w6<=0;w7<=0;w8<=0;
		oen<='0';
		dataout<=(others=>'0');
		width<=0;
	elsif clkx8'event and clkx8='1' then
		oe1<=oe2;oe2<=oe3;oe3<=oe4;oe4<=oe5;oe5<=oe6;oe6<=oe7;oe7<=oe8;oe8<=oe9;
		d1<=d2;d2<=d3;d3<=d4;d4<=d5;d5<=d6;d6<=d7;d7<=d8;d8<=d9;
		w1<=w2;w2<=w3;w3<=w4;w4<=w5;w5<=w6;w6<=w7;w7<=w8;w8<=w9;
		oen<=oe1;
		dataout<=d1;
		width<=w1;
	end if;
end process;

process(clkx10,reset)
begin
	if reset='0' then
		err<=x"00";
		bq1<=X"00";
		nq1<=X"00";
		k2<="0000";
	elsif clkx10'event and clkx10='1' then
		if wen='1' then
			err<=errval;
			bq1<=Bq;
			nq1<='0'&Nq;
			k2<=k;
		end if;
	end if;
end process;

process(clkx10,reset)
begin
	if reset='0' then
		js<=0;
	elsif clkx10'event and clkx10='1' then
		if wen='1' then
			js<=1;
		elsif js>0 and js<9 then
			js<=js+1;
		else js<=0;	
		end if;
	end if;
end process;

process(clkx10,reset)
begin
	if reset='0' then
		wen_in<='0';
	elsif clkx10'event and clkx10='1' then
		if wen='1' then
			wen_in<='1';
		elsif js=0 and wen='0' then
			wen_in<='0';
		end if;
	end if;
end process;

process(clk,reset)
begin
if reset='0' then
	rdy<='0';
elsif clk'event and clk='1' then
	rdy<=wen_in;
end if;
end process;

process(clk,reset)
begin
if reset='0' then
	kin<=0;
	errval_in<=x"00";
	b<=0;
	n<=0;
elsif clk'event and clk='1' then
	if wen_in='1' then
		kin<=conv_integer(k2);
		errval_in<=err;
		b<=conv_integer(not(bq1)+1);
		n<=conv_integer(nq1);
	end if;
end if;
end process;
		
process(clkx8,reset)
begin
if reset='0' then
	count<=0;
elsif clkx8'event and clkx8='1' then
	if rdy='1' then
		if count<7 then
			count<=count+1;
		else count<=0;
		end if;
	end if;
end if;
end process;

--预测误差的映射
process(reset,clkx8)
begin
if reset='0' then
	merrval<="000000000";
elsif clkx8'event and clkx8='1' then
	if count=1 then
		if NEAR=0 and kin=0 and 2*b>=n then
			if errval_in(7)='0' then
				merrval<=errval_in(7 downto 0)&'1';
			else merrval<=(not(errval_in(7 downto 0)&'0'))-1;
			end if;
		else
			if errval_in(7)='0' then
				merrval<=errval_in(7 downto 0)&'0';
			else merrval<=not (errval_in(7 downto 0)&'0');
			end if;
		end if;
	end if;
end if;
end process;

--映射误差的编码
process(reset,clkx8)
begin
if reset='0' then
	merrval_high<="00000000";
	merrval_low<="00000000";
elsif clkx8'event and clkx8='1' then
	if count=2 then
		case kin is
			when 0=>merrval_high<=merrval(7 downto 0);
					merrval_low<="00000000";
			when 1=>merrval_high<='0'&merrval(7 downto 1);
					merrval_low<=merrval(0)&"0000000";
			when 2=>merrval_high<="00"&merrval(7 downto 2);
					merrval_low<=merrval(1 downto 0)&"000000";
			when 3=>merrval_high<="000"&merrval(7 downto 3);
					merrval_low<=merrval(2 downto 0)&"00000";
			when 4=>merrval_high<="0000"&merrval(7 downto 4);
					merrval_low<=merrval(3 downto 0)&"0000";
			when 5=>merrval_high<="00000"&merrval(7 downto 5);
					merrval_low<=merrval(4 downto 0)&"000";
			when 6=>merrval_high<="000000"&merrval(7 downto 6);
					merrval_low<=merrval(5 downto 0)&"00";
			when 7=>merrval_high<="0000000"&merrval(7);
					merrval_low<=merrval(6 downto 0)&"0";
			when others=>merrval_high<="00000000";
						 merrval_low<=merrval(7 downto 0);
		end case;
	end if;
end if;
end process;

--output enable at 3st and 7st cycle.
process(clkx8,reset)
begin
if reset='0' then
	oe9<='0';
elsif clkx8'event and clkx8='1' then
	if count=3 or count=7 then
		oe9<='1';
	else oe9<='0';
	end if;
end if;
end process;

--data width and LSB bits of data store in data_reg.
process(reset,clkx8)
begin
if reset='0' then
	w9<=0;
	data_reg<=X"00";
elsif clkx8'event and clkx8='1' then
	if count=3 then
		if merrval_high<li then
			w9<=conv_integer(merrval_high);
			data_reg<=merrval_low;
		else w9<=li;
			 data_reg<=merrval(7 downto 0)-1;
		end if;
	elsif count=7 then
		if merrval_high<li then
			w9<=kin+1;
		else w9<=qbpp+1;
		end if;
	else w9<=0;
	end if;
end if;
end process;

--at 3st cycle output MSB of '0' bits
--at 7st output one '1' and LSB bits of data,high bits ative.
process(clkx8,reset)
begin
if reset='0' then
	d9<=(others=>'0');
elsif clkx8'event and clkx8='1' then
	if count=3 then 
		d9<=(others=>'0');
	elsif count=7 then
		d9<='1'&data_reg&X"000"&"00";
	end if;
end if;
end process;

end RTL;