rei2c.map.summary

用VHDL编写的quartusii平台上的串行EEPROM配置读取的程序。

Flow Status : Successful - Mon Jul 24 14:39:45 2006
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : rei2c
Top-level Entity Name : rei2c
Family : Cyclone
Device : EP1C12Q240I7
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 98
Total pins : 14
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0