lcd_top.plg

来自「基于FPGA的LCD1602驱动」· PLG 代码 · 共 18 行

@P:  Worst Slack : -0.336
@P:  Clock_Gen|U1.clk_counter_inferred_clock - Estimated Frequency : 161.9 MHz
@P:  Clock_Gen|U1.clk_counter_inferred_clock - Requested Frequency : 100.0 MHz
@P:  Clock_Gen|U1.clk_counter_inferred_clock - Estimated Period : 6.177
@P:  Clock_Gen|U1.clk_counter_inferred_clock - Requested Period : 10.000
@P:  Clock_Gen|U1.clk_counter_inferred_clock - Slack : 3.823
@P:  Clock_Gen|clk_BUF_inferred_clock - Estimated Frequency : 96.8 MHz
@P:  Clock_Gen|clk_BUF_inferred_clock - Requested Frequency : 100.0 MHz
@P:  Clock_Gen|clk_BUF_inferred_clock - Estimated Period : 10.336
@P:  Clock_Gen|clk_BUF_inferred_clock - Requested Period : 10.000
@P:  Clock_Gen|clk_BUF_inferred_clock - Slack : -0.336
@P:  Total Area : 487.0
@P:  Total Area : 439.0
@P:  Total Area : 45.0
@P:  Total Area : 0.0
@P:  Total Area : 487.0
@P:  CPU Time : 0h:00m:03s