📄 c8051_cfg.vhd
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--*******************************************************************--
-- Copyright (c) 1999-2001 Evatronix SA --
--*******************************************************************--
-- Please review the terms of the license agreement before using --
-- this file. If you are not an authorized user, please destroy this --
-- source code file and notify Evatronix SA immediately that you --
-- inadvertently received an unauthorized copy. --
--*******************************************************************--
-----------------------------------------------------------------------
-- Project name : C8051
-- Project description : C8051 Microcontroller Unit
--
-- File name : C8051.VHD
-- File contents : Entity C8051
-- Architecture STRUCTURAL of C8051
-- Purpose : Top-level structure of C8051
-- Synthesisable HDL Core
--
-- Destination library : C8051_LIB
-- Dependencies : C8051_LIB.UTILITY
-- IEEE.STD_LOGIC_1164
-- IEEE.STD_LOGIC_UNSIGNED
-- IEEE.STD_LOGIC_ARITH
--
-- Co-design Engineer : M.B. D.K. A.B. D.L.
-- Quality Engineer : M.B.
-- Version : 3.01.E00
-- Last modification : 2001-10-01
-----------------------------------------------------------------------
--*******************************************************************--
-- Modifications with respect to Version 3.00.E00:
-- 3.01.E00 :
-- 2001-10-01 : added OCI unit
--*******************************************************************--
library IEEE;
use IEEE.STD_LOGIC_1164.all;
library C8051_LIB;
use C8051_LIB.UTILITY.all;
--*******************************************************************--
configuration C8051_STRUCTURE of C8051 is
for STRUCTURAL
-----------------------------------------------------------------
-- Aritmetic Logic Unit
-----------------------------------------------------------------
for U_ALU : ALU
use entity C8051_LIB.ALU(RTL);
end for;
-----------------------------------------------------------------
-- Clock Control Unit
-----------------------------------------------------------------
for U_CLKCTRL : CLOCK_CONTROL
use entity C8051_LIB.CLOCK_CONTROL(RTL);
end for;
-----------------------------------------------------------------
-- Control Processor Unit
-----------------------------------------------------------------
for U_CPU : CONTROL_UNIT
use entity C8051_LIB.CONTROL_UNIT(RTL);
end for;
-----------------------------------------------------------------
-- Interrupt Service Routine Unit
-----------------------------------------------------------------
for U_ISR : ISR
use entity C8051_LIB.ISR(RTL);
end for;
-----------------------------------------------------------------
-- External Memory Control Unit
-----------------------------------------------------------------
for U_MEMCTRL : MEMORY_CONTROL
use entity C8051_LIB.MEMORY_CONTROL(RTL);
end for;
-----------------------------------------------------------------
-- OCI unit
-----------------------------------------------------------------
for U_OCI : OCI
use entity C8051_LIB.OCI(RTL);
end for;
-----------------------------------------------------------------
-- Port registers unit
-----------------------------------------------------------------
for U_PORTS : PORTS
use entity C8051_LIB.PORTS(RTL);
end for;
-----------------------------------------------------------------
-- 256B Data Memory and Special Function Registers Control Unit
-----------------------------------------------------------------
for U_RAMSFRCTRL : RAM_SFR_CONTROL
use entity C8051_LIB.RAM_SFR_CONTROL(RTL);
end for;
-----------------------------------------------------------------
-- Serial Interface Unit
-----------------------------------------------------------------
for U_SERIAL : SERIAL
use entity C8051_LIB.SERIAL(RTL);
end for;
-----------------------------------------------------------------
-- Timer/Counter 0 and 1
-----------------------------------------------------------------
for U_TIMER_0_1 : TIMER_0_1
use entity C8051_LIB.TIMER_0_1(RTL);
end for;
end for;
end C8051_STRUCTURE;
--*******************************************************************--
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