testapp_memorycaching.c

xapp from xilinx very hard to find and very usefull application note from the great firm from USA

/******************************************************************************
*
*     XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
*     SOLELY FOR USE IN DEVELOPING PROGRAMS AND SOLUTIONS FOR
*     XILINX DEVICES.  BY PROVIDING THIS DESIGN, CODE, OR INFORMATION
*     AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION
*     OR STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS
*     IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
*     AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
*     FOR YOUR IMPLEMENTATION.  XILINX EXPRESSLY DISCLAIMS ANY
*     WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
*     IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
*     REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
*     INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
*     FOR A PARTICULAR PURPOSE.
*
*     (c) Copyright 2005-2006 Xilinx, Inc.
*     All rights reserved.
*
******************************************************************************/
/******************************************************************************
* Filename:     TestApp_MemoryCaching.c
*
* Description:
* This software application tests the cache ability of the MCH OPB EMC
* with OPB Central DMA. The software application is run from the cacheable
* part of memory, while DMA transactions are occurring inside the non-cacheable
* part of memory. The source address data gets copied to the destination
* address data, when this is finished it causes an interrupt that should be
* cleared by the software application and the destination data is checked with
* the source data to ensure proper transfer. The LEDs light up once the
* transaction is successful.
*
*
* MODIFICATION HISTORY:
*
* Ver   Who  Date     Changes
* ----- ---- -------- -------------------------------------------------------
* 1.00  jel  7-29-05  Initial Release
* 1.01  sun  3-21-06  Modified the code for MCH OPB EMC
*
*
******************************************************************************/


/***************************** Include Files *********************************/

#include "xparameters.h"
#include "xutil.h"
#include "xuartns550_l.h"
#include "xdmacentral.h"
#include "xintc.h"
#include "xgpio.h"


/************************** Constant Definitions *****************************/

/*
 * The following constants map to the XPAR parameters created in the
 * xparameters.h file. They are defined here such that a user can easily
 * change all the needed parameters in one place.
 */

/*
 * OPB Central DMA Device ID
 */
#define OPB_CENTRAL_DMA_DEVICEID    XPAR_OPB_CENTRAL_DMA_0_DEVICE_ID

/*
 * OPB Central DMA Base Address
 */
#define OPB_CENTRAL_DMA_BASEADDR    XPAR_OPB_CENTRAL_DMA_0_BASEADDR

/*
 * Source Address for DMA
 */
#define OPB_CENTRAL_DMA_SA \
        XPAR_P160_SRAM_256KX32_FLASH_1MX32_MEM0_BASEADDR + 0x80000

/*
 * Destination Address for DMA
 */
#define OPB_CENTRAL_DMA_DA \
        XPAR_P160_SRAM_256KX32_FLASH_1MX32_MEM0_BASEADDR + 0x88000

/*
 * Interrupt Controller Device ID
 */
#define INTC_DEVICE_ID      XPAR_OPB_INTC_0_DEVICE_ID


#define INTR_ID            \
        XPAR_OPB_INTC_0_OPB_CENTRAL_DMA_0_DMA_INTERRUPT_INTR

/*
 * Base Address of GPIO connected to the LEDs
 */
#define LED_BASEADDR         XPAR_LEDS_4BIT_BASEADDR


/*
 * Base Address of UART device
 */
#define UARTNS550_BASEADDR   XPAR_RS232_BASEADDR

/*
 * Clock for the UART device
 */
#define UARTNS550_CLOCK_HZ   XPAR_XUARTNS550_CLOCK_HZ
/*
 * The following constant controls the length of the buffers for DMA transfer
 * test.
 */
#define BUFFER_BYTESIZE 8000
#define BUFFER_WORDSIZE \
            ((BUFFER_BYTESIZE + sizeof(Xuint32) - 1) / sizeof(Xuint32))

#define OPB_CENTRAL_DMA_CR      0xC0000004   /* Set SINC, DINC, and word size */
#define OPB_CENTRAL_DMA_LEN     BUFFER_BYTESIZE /* Length of DMA operation */

/************************** Function Prototypes ******************************/

static XStatus SetupInterruptSystem(XDmaCentral *DmaCentralPtr);
static void DmaInterruptHandler(void *CallBackRef);
static void SrcDesWriteClear(XIo_Address SrcA, XIo_Address DesA);
static XStatus WaitForDmaCompletion();
void WriteToGPOutput(Xuint32 BaseAddress, Xuint32 GpioWidth);
void error(void);

/************************** Variable Definitions ******************************/

static XDmaCentral DmaCentral;      /* Instance of the Central DMA */
static XIntc InterruptController;   /* Instance of the Interrupt Controller */

/*
 * Shared variables used to test the DMA transfer operations.
 */
volatile static Xboolean DmaDone = XFALSE;       /* DMA transfer is done   */
volatile static Xboolean DmaBusError = XFALSE;   /* DMA Bus Error occurs   */
volatile static Xboolean DmaBusTimeout = XFALSE; /* DMA Bus Timeout occurs */


/*****************************************************************************/
/**
*
* This is the main function for the tests done on MCH OPB EMC.
*
* @param    None
*
* @return   XST_SUCCESS to indicate success.
*
* @note     This function does not return if there is a failure.
*
******************************************************************************/
int main (void)
{
    Xuint16 DeviceId = OPB_CENTRAL_DMA_DEVICEID; /* DMA device ID */
    XStatus Status;
    XIo_Address SourceAdd;
    XIo_Address DesAdd;


   /*
    * Enable and initialize cache
    */
    microblaze_init_icache_range(0x30000000, 8192);
    microblaze_init_dcache_range(0x30000000, 8192);

    microblaze_enable_icache();
    microblaze_enable_dcache();


   /*
    * Initialize RS232 - Set baud rate and number of stop bits
    */
    XUartNs550_SetBaud(UARTNS550_BASEADDR, UARTNS550_CLOCK_HZ, 9600);
    XUartNs550_mSetLineControlReg(UARTNS550_BASEADDR, XUN_LCR_8_DATA_BITS);

    xil_printf("-- Entering main() --\r\n");

    /*
     * Designate memory locations for the Source and Destination Address
     */
    SourceAdd = OPB_CENTRAL_DMA_SA;
    DesAdd = OPB_CENTRAL_DMA_DA;

    /*
     * Write and clear source and destination Address
     */
    SrcDesWriteClear(SourceAdd, DesAdd);

    /*
     *Initialize the DMA instance
     */
    Status = XDmaCentral_Initialize(&DmaCentral, DeviceId);
    if (Status != XST_SUCCESS)
    {
        xil_printf("The Central DMA Didn't Initialize! \r\n");
        error();
    }

    /*
     * Reset the DMA device.
     */
    (void)XDmaCentral_Reset(&DmaCentral);

    /*
     * Setup the DMA Control register to be:
     *      - source address incrementing
     *      - destination address incrementing
     *      - using word data size
     */
    XDmaCentral_SetControl(&DmaCentral, OPB_CENTRAL_DMA_CR);

    /*
     * Enable DMA Done and DMA Error interrupts
     */
    XDmaCentral_InterruptEnableSet(&DmaCentral,
                                   XDMC_IXR_DMA_DONE_MASK |
                                   XDMC_IXR_DMA_ERROR_MASK);


    /*
     * Setup interrupt system
     */
    Status = SetupInterruptSystem(&DmaCentral);
    if (Status != XST_SUCCESS)
    {
        xil_printf("The Interrupt System Didn't Initialize! \r\n");
        error();
    }


    /*
     * Start the DMA transfer.
     */
    xil_printf("\r\nStarting DMA Transfer\r\n");

    XDmaCentral_Transfer(&DmaCentral, (void *)OPB_CENTRAL_DMA_SA,
                         (void *)OPB_CENTRAL_DMA_DA, BUFFER_BYTESIZE);

    /*
     * Wait until the DMA transfer is done or Bus error/timeout occurs.
     */
    Status = WaitForDmaCompletion();
    if (Status != XST_SUCCESS)
    {
        xil_printf("DMA Transactions Were Not Successful \r\n");
        error();
    }

    xil_printf("\r\nCongratulations! DMA Operations Completed Successfully!\r\n");

    /*
     * Let the LEDs blink if everything worked correctly
     */
    WriteToGPOutput(LED_BASEADDR, 4);

    /*
     * Disable cache and reinitialize it so that other
     * applications can be run with no problems
     */
    microblaze_init_dcache_range(0x30000000, 8192);
    microblaze_init_icache_range(0x30000000, 8192);

    microblaze_disable_icache();
    microblaze_disable_dcache();

    xil_printf("\r\n-- Exiting main() --\r\n");

    return XST_SUCCESS;
}


/****************************************************************************/
/**
*
* This function sets up the interrupt system for the example.  The processing
* contained in this funtion assumes the hardware system was built with
* and interrupt controller and also assumes use of the PowerPC.
*
* @param    DmaCentralPtr is a pointer to the instance of the DMA Central
*           device.
*
* @return   XST_SUCCESS to indicate success, else XST_FAILURE to indicate
*           failure.
*
* @note     None.
*
*****************************************************************************/
static XStatus SetupInterruptSystem(XDmaCentral *DmaCentralPtr)
{
    XStatus Status;