sram.hier_info

基于altera ep2c8双口RAM

address_a[2] => ram_block2a7.PORTAADDR2
address_a[2] => ram_block2a8.PORTAADDR2
address_a[2] => ram_block2a9.PORTAADDR2
address_a[2] => ram_block2a10.PORTAADDR2
address_a[2] => ram_block2a11.PORTAADDR2
address_a[2] => ram_block2a12.PORTAADDR2
address_a[2] => ram_block2a13.PORTAADDR2
address_a[2] => ram_block2a14.PORTAADDR2
address_a[2] => ram_block2a15.PORTAADDR2
address_a[2] => ram_block2a16.PORTAADDR2
address_a[2] => ram_block2a17.PORTAADDR2
address_a[2] => ram_block2a18.PORTAADDR2
address_a[2] => ram_block2a19.PORTAADDR2
address_a[2] => ram_block2a20.PORTAADDR2
address_a[2] => ram_block2a21.PORTAADDR2
address_a[2] => ram_block2a22.PORTAADDR2
address_a[2] => ram_block2a23.PORTAADDR2
address_a[2] => ram_block2a24.PORTAADDR2
address_a[2] => ram_block2a25.PORTAADDR2
address_a[2] => ram_block2a26.PORTAADDR2
address_a[2] => ram_block2a27.PORTAADDR2
address_a[2] => ram_block2a28.PORTAADDR2
address_a[2] => ram_block2a29.PORTAADDR2
address_a[2] => ram_block2a30.PORTAADDR2
address_a[2] => ram_block2a31.PORTAADDR2
address_a[3] => ram_block2a0.PORTAADDR3
address_a[3] => ram_block2a1.PORTAADDR3
address_a[3] => ram_block2a2.PORTAADDR3
address_a[3] => ram_block2a3.PORTAADDR3
address_a[3] => ram_block2a4.PORTAADDR3
address_a[3] => ram_block2a5.PORTAADDR3
address_a[3] => ram_block2a6.PORTAADDR3
address_a[3] => ram_block2a7.PORTAADDR3
address_a[3] => ram_block2a8.PORTAADDR3
address_a[3] => ram_block2a9.PORTAADDR3
address_a[3] => ram_block2a10.PORTAADDR3
address_a[3] => ram_block2a11.PORTAADDR3
address_a[3] => ram_block2a12.PORTAADDR3
address_a[3] => ram_block2a13.PORTAADDR3
address_a[3] => ram_block2a14.PORTAADDR3
address_a[3] => ram_block2a15.PORTAADDR3
address_a[3] => ram_block2a16.PORTAADDR3
address_a[3] => ram_block2a17.PORTAADDR3
address_a[3] => ram_block2a18.PORTAADDR3
address_a[3] => ram_block2a19.PORTAADDR3
address_a[3] => ram_block2a20.PORTAADDR3
address_a[3] => ram_block2a21.PORTAADDR3
address_a[3] => ram_block2a22.PORTAADDR3
address_a[3] => ram_block2a23.PORTAADDR3
address_a[3] => ram_block2a24.PORTAADDR3
address_a[3] => ram_block2a25.PORTAADDR3
address_a[3] => ram_block2a26.PORTAADDR3
address_a[3] => ram_block2a27.PORTAADDR3
address_a[3] => ram_block2a28.PORTAADDR3
address_a[3] => ram_block2a29.PORTAADDR3
address_a[3] => ram_block2a30.PORTAADDR3
address_a[3] => ram_block2a31.PORTAADDR3
address_a[4] => ram_block2a0.PORTAADDR4
address_a[4] => ram_block2a1.PORTAADDR4
address_a[4] => ram_block2a2.PORTAADDR4
address_a[4] => ram_block2a3.PORTAADDR4
address_a[4] => ram_block2a4.PORTAADDR4
address_a[4] => ram_block2a5.PORTAADDR4
address_a[4] => ram_block2a6.PORTAADDR4
address_a[4] => ram_block2a7.PORTAADDR4
address_a[4] => ram_block2a8.PORTAADDR4
address_a[4] => ram_block2a9.PORTAADDR4
address_a[4] => ram_block2a10.PORTAADDR4
address_a[4] => ram_block2a11.PORTAADDR4
address_a[4] => ram_block2a12.PORTAADDR4
address_a[4] => ram_block2a13.PORTAADDR4
address_a[4] => ram_block2a14.PORTAADDR4
address_a[4] => ram_block2a15.PORTAADDR4
address_a[4] => ram_block2a16.PORTAADDR4
address_a[4] => ram_block2a17.PORTAADDR4
address_a[4] => ram_block2a18.PORTAADDR4
address_a[4] => ram_block2a19.PORTAADDR4
address_a[4] => ram_block2a20.PORTAADDR4
address_a[4] => ram_block2a21.PORTAADDR4
address_a[4] => ram_block2a22.PORTAADDR4
address_a[4] => ram_block2a23.PORTAADDR4
address_a[4] => ram_block2a24.PORTAADDR4
address_a[4] => ram_block2a25.PORTAADDR4
address_a[4] => ram_block2a26.PORTAADDR4
address_a[4] => ram_block2a27.PORTAADDR4
address_a[4] => ram_block2a28.PORTAADDR4
address_a[4] => ram_block2a29.PORTAADDR4
address_a[4] => ram_block2a30.PORTAADDR4
address_a[4] => ram_block2a31.PORTAADDR4
address_a[5] => ram_block2a0.PORTAADDR5
address_a[5] => ram_block2a1.PORTAADDR5
address_a[5] => ram_block2a2.PORTAADDR5
address_a[5] => ram_block2a3.PORTAADDR5
address_a[5] => ram_block2a4.PORTAADDR5
address_a[5] => ram_block2a5.PORTAADDR5
address_a[5] => ram_block2a6.PORTAADDR5
address_a[5] => ram_block2a7.PORTAADDR5
address_a[5] => ram_block2a8.PORTAADDR5
address_a[5] => ram_block2a9.PORTAADDR5
address_a[5] => ram_block2a10.PORTAADDR5
address_a[5] => ram_block2a11.PORTAADDR5
address_a[5] => ram_block2a12.PORTAADDR5
address_a[5] => ram_block2a13.PORTAADDR5
address_a[5] => ram_block2a14.PORTAADDR5
address_a[5] => ram_block2a15.PORTAADDR5
address_a[5] => ram_block2a16.PORTAADDR5
address_a[5] => ram_block2a17.PORTAADDR5
address_a[5] => ram_block2a18.PORTAADDR5
address_a[5] => ram_block2a19.PORTAADDR5
address_a[5] => ram_block2a20.PORTAADDR5
address_a[5] => ram_block2a21.PORTAADDR5
address_a[5] => ram_block2a22.PORTAADDR5
address_a[5] => ram_block2a23.PORTAADDR5
address_a[5] => ram_block2a24.PORTAADDR5
address_a[5] => ram_block2a25.PORTAADDR5
address_a[5] => ram_block2a26.PORTAADDR5
address_a[5] => ram_block2a27.PORTAADDR5
address_a[5] => ram_block2a28.PORTAADDR5
address_a[5] => ram_block2a29.PORTAADDR5
address_a[5] => ram_block2a30.PORTAADDR5
address_a[5] => ram_block2a31.PORTAADDR5
address_a[6] => ram_block2a0.PORTAADDR6
address_a[6] => ram_block2a1.PORTAADDR6
address_a[6] => ram_block2a2.PORTAADDR6
address_a[6] => ram_block2a3.PORTAADDR6
address_a[6] => ram_block2a4.PORTAADDR6
address_a[6] => ram_block2a5.PORTAADDR6
address_a[6] => ram_block2a6.PORTAADDR6
address_a[6] => ram_block2a7.PORTAADDR6
address_a[6] => ram_block2a8.PORTAADDR6
address_a[6] => ram_block2a9.PORTAADDR6
address_a[6] => ram_block2a10.PORTAADDR6
address_a[6] => ram_block2a11.PORTAADDR6
address_a[6] => ram_block2a12.PORTAADDR6
address_a[6] => ram_block2a13.PORTAADDR6
address_a[6] => ram_block2a14.PORTAADDR6
address_a[6] => ram_block2a15.PORTAADDR6
address_a[6] => ram_block2a16.PORTAADDR6
address_a[6] => ram_block2a17.PORTAADDR6
address_a[6] => ram_block2a18.PORTAADDR6
address_a[6] => ram_block2a19.PORTAADDR6
address_a[6] => ram_block2a20.PORTAADDR6
address_a[6] => ram_block2a21.PORTAADDR6
address_a[6] => ram_block2a22.PORTAADDR6
address_a[6] => ram_block2a23.PORTAADDR6
address_a[6] => ram_block2a24.PORTAADDR6
address_a[6] => ram_block2a25.PORTAADDR6
address_a[6] => ram_block2a26.PORTAADDR6
address_a[6] => ram_block2a27.PORTAADDR6
address_a[6] => ram_block2a28.PORTAADDR6
address_a[6] => ram_block2a29.PORTAADDR6
address_a[6] => ram_block2a30.PORTAADDR6
address_a[6] => ram_block2a31.PORTAADDR6
address_a[7] => ram_block2a0.PORTAADDR7
address_a[7] => ram_block2a1.PORTAADDR7
address_a[7] => ram_block2a2.PORTAADDR7
address_a[7] => ram_block2a3.PORTAADDR7
address_a[7] => ram_block2a4.PORTAADDR7
address_a[7] => ram_block2a5.PORTAADDR7
address_a[7] => ram_block2a6.PORTAADDR7
address_a[7] => ram_block2a7.PORTAADDR7
address_a[7] => ram_block2a8.PORTAADDR7
address_a[7] => ram_block2a9.PORTAADDR7
address_a[7] => ram_block2a10.PORTAADDR7
address_a[7] => ram_block2a11.PORTAADDR7
address_a[7] => ram_block2a12.PORTAADDR7
address_a[7] => ram_block2a13.PORTAADDR7
address_a[7] => ram_block2a14.PORTAADDR7
address_a[7] => ram_block2a15.PORTAADDR7
address_a[7] => ram_block2a16.PORTAADDR7
address_a[7] => ram_block2a17.PORTAADDR7
address_a[7] => ram_block2a18.PORTAADDR7
address_a[7] => ram_block2a19.PORTAADDR7
address_a[7] => ram_block2a20.PORTAADDR7
address_a[7] => ram_block2a21.PORTAADDR7
address_a[7] => ram_block2a22.PORTAADDR7
address_a[7] => ram_block2a23.PORTAADDR7
address_a[7] => ram_block2a24.PORTAADDR7
address_a[7] => ram_block2a25.PORTAADDR7
address_a[7] => ram_block2a26.PORTAADDR7
address_a[7] => ram_block2a27.PORTAADDR7
address_a[7] => ram_block2a28.PORTAADDR7
address_a[7] => ram_block2a29.PORTAADDR7
address_a[7] => ram_block2a30.PORTAADDR7
address_a[7] => ram_block2a31.PORTAADDR7
address_a[8] => ram_block2a0.PORTAADDR8
address_a[8] => ram_block2a1.PORTAADDR8
address_a[8] => ram_block2a2.PORTAADDR8
address_a[8] => ram_block2a3.PORTAADDR8
address_a[8] => ram_block2a4.PORTAADDR8
address_a[8] => ram_block2a5.PORTAADDR8
address_a[8] => ram_block2a6.PORTAADDR8
address_a[8] => ram_block2a7.PORTAADDR8
address_a[8] => ram_block2a8.PORTAADDR8
address_a[8] => ram_block2a9.PORTAADDR8
address_a[8] => ram_block2a10.PORTAADDR8
address_a[8] => ram_block2a11.PORTAADDR8
address_a[8] => ram_block2a12.PORTAADDR8
address_a[8] => ram_block2a13.PORTAADDR8
address_a[8] => ram_block2a14.PORTAADDR8
address_a[8] => ram_block2a15.PORTAADDR8
address_a[8] => ram_block2a16.PORTAADDR8
address_a[8] => ram_block2a17.PORTAADDR8
address_a[8] => ram_block2a18.PORTAADDR8
address_a[8] => ram_block2a19.PORTAADDR8
address_a[8] => ram_block2a20.PORTAADDR8
address_a[8] => ram_block2a21.PORTAADDR8
address_a[8] => ram_block2a22.PORTAADDR8
address_a[8] => ram_block2a23.PORTAADDR8
address_a[8] => ram_block2a24.PORTAADDR8
address_a[8] => ram_block2a25.PORTAADDR8
address_a[8] => ram_block2a26.PORTAADDR8
address_a[8] => ram_block2a27.PORTAADDR8
address_a[8] => ram_block2a28.PORTAADDR8
address_a[8] => ram_block2a29.PORTAADDR8
address_a[8] => ram_block2a30.PORTAADDR8
address_a[8] => ram_block2a31.PORTAADDR8
address_a[9] => ram_block2a0.PORTAADDR9
address_a[9] => ram_block2a1.PORTAADDR9
address_a[9] => ram_block2a2.PORTAADDR9
address_a[9] => ram_block2a3.PORTAADDR9
address_a[9] => ram_block2a4.PORTAADDR9
address_a[9] => ram_block2a5.PORTAADDR9
address_a[9] => ram_block2a6.PORTAADDR9
address_a[9] => ram_block2a7.PORTAADDR9
address_a[9] => ram_block2a8.PORTAADDR9
address_a[9] => ram_block2a9.PORTAADDR9
address_a[9] => ram_block2a10.PORTAADDR9
address_a[9] => ram_block2a11.PORTAADDR9
address_a[9] => ram_block2a12.PORTAADDR9
address_a[9] => ram_block2a13.PORTAADDR9
address_a[9] => ram_block2a14.PORTAADDR9
address_a[9] => ram_block2a15.PORTAADDR9
address_a[9] => ram_block2a16.PORTAADDR9
address_a[9] => ram_block2a17.PORTAADDR9
address_a[9] => ram_block2a18.PORTAADDR9
address_a[9] => ram_block2a19.PORTAADDR9
address_a[9] => ram_block2a20.PORTAADDR9
address_a[9] => ram_block2a21.PORTAADDR9
address_a[9] => ram_block2a22.PORTAADDR9
address_a[9] => ram_block2a23.PORTAADDR9
address_a[9] => ram_block2a24.PORTAADDR9
address_a[9] => ram_block2a25.PORTAADDR9
address_a[9] => ram_block2a26.PORTAADDR9
address_a[9] => ram_block2a27.PORTAADDR9
address_a[9] => ram_block2a28.PORTAADDR9
address_a[9] => ram_block2a29.PORTAADDR9
address_a[9] => ram_block2a30.PORTAADDR9
address_a[9] => ram_block2a31.PORTAADDR9
address_a[10] => ram_block2a0.PORTAADDR10
address_a[10] => ram_block2a1.PORTAADDR10
address_a[10] => ram_block2a2.PORTAADDR10
address_a[10] => ram_block2a3.PORTAADDR10
address_a[10] => ram_block2a4.PORTAADDR10
address_a[10] => ram_block2a5.PORTAADDR10
address_a[10] => ram_block2a6.PORTAADDR10
address_a[10] => ram_block2a7.PORTAADDR10
address_a[10] => ram_block2a8.PORTAADDR10
address_a[10] => ram_block2a9.PORTAADDR10
address_a[10] => ram_block2a10.PORTAADDR10
address_a[10] => ram_block2a11.PORTAADDR10
address_a[10] => ram_block2a12.PORTAADDR10
address_a[10] => ram_block2a13.PORTAADDR10
address_a[10] => ram_block2a14.PORTAADDR10
address_a[10] => ram_block2a15.PORTAADDR10
address_a[10] => ram_block2a16.PORTAADDR10
address_a[10] => ram_block2a17.PORTAADDR10
address_a[10] => ram_block2a18.PORTAADDR10
address_a[10] => ram_block2a19.PORTAADDR10
address_a[10] => ram_block2a20.PORTAADDR10
address_a[10] => ram_block2a21.PORTAADDR10
address_a[10] => ram_block2a22.PORTAADDR10
address_a[10] => ram_block2a23.PORTAADDR10
address_a[10] => ram_block2a24.PORTAADDR10
address_a[10] => ram_block2a25.PORTAADDR10
address_a[10] => ram_block2a26.PORTAADDR10
address_a[10] => ram_block2a27.PORTAADDR10
address_a[10] => ram_block2a28.PORTAADDR10
address_a[10] => ram_block2a29.PORTAADDR10
address_a[10] => ram_block2a30.PORTAADDR10
address_a[10] => ram_block2a31.PORTAADDR10
address_a[11] => ram_block2a0.PORTAADDR11
address_a[11] => ram_block2a1.PORTAADDR11
address_a[11] => ram_block2a2.PORTAADDR11
address_a[11] => ram_block2a3.PORTAADDR11
address_a[11] => ram_block2a4.PORTAADDR11
address_a[11] => ram_block2a5.PORTAADDR11
address_a[11] => ram_block2a6.PORTAADDR11
address_a[11] => ram_block2a7.PORTAADDR11
address_a[11] => ram_block2a8.PORTAADDR11
address_a[11] => ram_block2a9.PORTAADDR11
address_a[11] => ram_block2a10.PORTAADDR11
address_a[11] => ram_block2a11.PORTAADDR11
address_a[11] => ram_block2a12.PORTAADDR11
address_a[11] => ram_block2a13.PORTAADDR11
address_a[11] => ram_block2a14.PORTAADDR11
address_a[11] => ram_block2a15.PORTAADDR11
address_a[11] => ram_block2a16.PORTAADDR11
address_a[11] => ram_block2a17.PORTAADDR11
address_a[11] => ram_block2a18.PORTAADDR11
address_a[11] => ram_block2a19.PORTAADDR11
address_a[11] => ram_block2a20.PORTAADDR11
address_a[11] => ram_block2a21.PORTAADDR11
address_a[11] => ram_block2a22.PORTAADDR11
address_a[11] => ram_block2a23.PORTAADDR11
address_a[11] => ram_block2a24.PORTAADDR11
address_a[11] => ram_block2a25.PORTAADDR11
address_a[11] => ram_block2a26.PORTAADDR11
address_a[11] => ram_block2a27.PORTAADDR11
address_a[11] => ram_block2a28.PORTAADDR11
address_a[11] => ram_block2a29.PORTAADDR11
address_a[11] => ram_block2a30.PORTAADDR11
address_a[11] => ram_block2a31.PORTAADDR11
address_a[12] => address_reg_a[0].DATAIN
address_a[12] => decode_1oa:decode3.data[0]