ima_adpcm_top.vhd

This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM.

----------------------------------------------------------------------------------
-- Company:       VISENGI S.L. (www.visengi.com)
-- Engineer:      Victor Lopez Lorenzo (victor.lopez (at) visengi (dot) com)
-- 
-- Create Date:    19:34:36 04/November/2008
-- Project Name:   IMA ADPCM Encoder
-- Tool versions:  Xilinx ISE 9.2i
-- Description: 
--
-- Description: This project features a full-hardware sound compressor using the well known algorithm IMA ADPCM.
--              The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player
--              with the IMA ADPCM codec (included by default in every Windows). Includes a testbench that takes
--              an uncompressed PCM 16 bits Mono WAV file and outputs an IMA ADPCM compressed WAV file.
--              Compression ratio is fixed for IMA-ADPCM, being 4:1.
--
--
-- LICENSE TERMS: GNU GENERAL PUBLIC LICENSE Version 3
--
--     That is you may use it only in NON-COMMERCIAL projects.
--     You are only required to include in the copyrights/about section 
--     that your system contains a "IMA ADPCM Encoder (C) VISENGI S.L. under GPL license"
--     This holds also in the case where you modify the core, as the resulting core
--     would be a derived work.
--     Also, we would like to know if you use this core in a project of yours, just an email will do.
--
--    Please take good note of the disclaimer section of the GPL license, as we don't
--    take any responsability for anything that this core does.
----------------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity IMA_ADPCM_top is
   Port (  wb_clk_i : in std_logic;
           wb_rst_i : in std_logic;           
           wb_cyc_i : in std_logic;
           wb_stb_i : in std_logic;
           wb_we_i  : in std_logic;
           wb_adr_i : in std_logic_vector(1 downto 0);
           wb_dat_i : in std_logic_vector(15 downto 0);
           wb_dat_o : out std_logic_vector(15 downto 0);
           wb_ack_o : out std_logic);
end IMA_ADPCM_top;

architecture Behavioral of IMA_ADPCM_top is
   component IMA_ADPCM_Encode port (
           clk : in  STD_LOGIC;
           reset : in  STD_LOGIC;
           PredictedValue_o : out std_logic_vector(15 downto 0);
           StepIndex_o : out std_logic_vector(6 downto 0);
           StateRDY : out std_logic;
			  sample : in std_logic_vector(15 downto 0); --don't change it while sample_rdy='1'
           sample_rdy : in std_logic; --lower it only when ADPCM_sample_rdy = '1'
			  ADPCM_sample : out std_logic_vector(3 downto 0);
           ADPCM_sample_rdy : out std_logic);
   end component;

	component WAV_header_rom port( 
		addr0	: in  STD_LOGIC_VECTOR(5 downto 0); 
		clk   : in  STD_LOGIC; 
		datao0: out STD_LOGIC_VECTOR(7 downto 0));
	end component;
   
   signal WAV_addr : std_logic_vector(5 downto 0);
   signal WAV_data : std_logic_vector(7 downto 0);
   
   signal sample : std_logic_vector(15 downto 0);
   signal ADPCM_sample : std_logic_vector(3 downto 0);
   signal sample_rdy, ADPCM_sample_rdy : std_logic;
   
   signal soft_reset, isoft_reset : std_logic;
   signal iwb_ack_o : std_logic;
   
   
   -- IMPORTANT: Remember that flow control MUST be done externally (that is, if SamplesPerSec is set to 8000, then 8000 samples must be fed every second)
   -- The first 60 bytes of data correspond to the WAV header
   --
   --WISHBONE REGS' DESCRIPTION:
   --reg 0: Control(W: WRITES)/Status(R: READS)
   --    bit 15: (R) 0=finished, 1=compressing (W) 0=end file (if compressing), 1=start file compression
   --          clearing this bit while compressing doesn't immediately end it, because the current block must be finished (block size=256 bytes)
   --                the only thing that happens is that the next samples up to the end of the block (samples_per_block=505) will be zeros (silence).
   --    bit  1: (R) 1=ready for new input sample to be written on reg 3 (auto-cleared on write to reg 3), 0=processing last input sample
   --    bit  0: (R) 1=16 bits of output file are ready to be read on reg 3 (auto-cleared on read to reg 3), 0=processing next output word
   --reg 1: SamplesPerSec (i.e.: 8000, 22050, 32000, 44100, ...)
   --reg 2: SecondsToCompress (0 for undefined (max values will be used in file headers) -> the sound will be complete and reproducible but an "early EOF" or "damaged file" error may appear in player at the end of the sound)
   --reg 3: On writes: a 16 bit sample is expected - On reads: data lines will contain 16 bits of the compressed output file (only if reg(0)(0)='1'!!!)
      --output words of 16 bits should be read from MSB to LSB
   
   signal SamplesPerSec1, SecondsToCompress2, CompressedWord : std_logic_vector(15 downto 0);
   signal InputRDY, OutputRDY, OutputRDY_sync2, RDYOutput, FinishBlock : std_logic;
   signal StartCompressing, Compressing, EndCompression : std_logic;
   signal CompressedNibbles : integer range 0 to 4;
   
   signal WriteHeader, WriteHeader_sync2 : std_logic;
   signal WriteState, WriteState_sync2 : std_logic;
   signal BlockBytes : integer range 0 to 255;
   signal SecondsCompressed : std_logic_vector(15 downto 0);
   signal SamplesCompressed : std_logic_vector(15 downto 0);
   signal MSB, LoadROM : std_logic;
   signal SamplesInFile : std_logic_vector(31 downto 0);
   
 	signal PredictedValue : std_logic_vector(15 downto 0);
	signal StepIndex : std_logic_vector(6 downto 0);
   signal StateRDY : std_logic;
   signal WriteStateLSWord : std_logic;
begin
   isoft_reset <= soft_reset or wb_rst_i;

   WAV_ROM: WAV_header_rom port map (
      addr0 => WAV_addr,
      clk => wb_clk_i,
      datao0 => WAV_data);
   
   IMA_ADPCM_Encoder : IMA_ADPCM_Encode port map (
      clk => wb_clk_i,
      reset => isoft_reset,
      PredictedValue_o => PredictedValue,
      StepIndex_o => StepIndex,
      StateRDY => StateRDY,
      sample => sample,
      sample_rdy => sample_rdy,
      ADPCM_sample => ADPCM_sample,
      ADPCM_sample_rdy => ADPCM_sample_rdy);
      
   Input_process : process (wb_clk_i, wb_rst_i)
      variable WaitW : std_logic;
   begin
      if (wb_rst_i = '1') then
         iwb_ack_o <= '0';
         wb_dat_o <= (others => '0');
         InputRDY <= '0';
         OutputRDY <= '0';
         OutputRDY_sync2 <= '0';
         SamplesPerSec1 <= (others => '0');
         SecondsToCompress2 <= (others => '0');
         Compressing <= '0';
         StartCompressing <= '0';
         WaitW := '0';
         soft_reset <= '0';

         sample <= (others => '0');
         sample_rdy <= '0';
      elsif (wb_clk_i = '1' and wb_clk_i'event) then
         OutputRDY_sync2 <= OutputRDY;
         soft_reset <= '0';
         iwb_ack_o <= wb_cyc_i and wb_stb_i and not iwb_ack_o;
         
         if (RDYOutput = '1') then OutputRDY <= '1'; end if;
         if (ADPCM_sample_rdy = '1') then
            sample_rdy <= '0';
            if (CompressedNibbles < 3 and WriteState = '0') then InputRDY <= '1'; end if;
         end if;
         
         if (OutputRDY_sync2 = '1' and OutputRDY = '0' and WriteState = '0' and WriteHeader = '0') then InputRDY <= '1'; end if;
         if (((OutputRDY_sync2 = '1' and OutputRDY = '0') or (WriteHeader_sync2 = '1' and WriteHeader = '0')) and WriteState = '1' and BlockBytes = 0 and WaitW = '0') then InputRDY <= '1'; WaitW := '1'; end if; --to write the block header one input sample is required
         if (WriteState_sync2 = '1' and WriteState = '0') then InputRDY <= '1'; WaitW := '0'; end if; --after writing the block header, ask for input sample
         
         
         if (EndCompression = '1') then Compressing <= '0'; end if;

         if (FinishBlock = '1') then
            sample <= x"0000";
            sample_rdy <= '1';
            InputRDY <= '0';
         end if;
         
         if (wb_cyc_i = '1' and wb_stb_i = '1') then
            case wb_adr_i is
               when "00" => --control/status
                  if (wb_we_i = '0') then --read = status
                     wb_dat_o <= (others => '0');
                     wb_dat_o(15) <= Compressing;
                     wb_dat_o(1) <= InputRDY;
                     wb_dat_o(0) <= OutputRDY;
                  else --write = control
                     StartCompressing <= wb_dat_i(15);
                     if (wb_dat_i(15) = '1' and Compressing = '0') then --start new operation?
                        soft_reset <= '1';
                        OutputRDY <= '0';
                        InputRDY <= '0'; --wait for WriteHeader
                        Compressing <= '1';
                     end if;                        
                  end if;
               when "11" => --data in/out
                  if (wb_we_i = '0') then --read = get compressed data
                     if (OutputRDY = '1') then
                        wb_dat_o <= CompressedWord;
                        OutputRDY <= '0';
                     end if;
                  else --write = put input sample
                     if (InputRDY = '1') then
                        if (FinishBlock = '0') then sample <= wb_dat_i; else sample <= x"0000"; end if;
                        sample_rdy <= '1';
                        InputRDY <= '0';
                     end if;
                  end if;
               when "01" => --SamplesPerSec
                  if (wb_we_i = '0') then --read
                     wb_dat_o <= SamplesPerSec1;
                  else --write
                     SamplesPerSec1 <= wb_dat_i;
                  end if;
               when "10" => --SecondsToCompress
                  if (wb_we_i = '0') then --read
                     wb_dat_o <= SecondsToCompress2;
                  else --write
                     SecondsToCompress2 <= wb_dat_i;
                  end if;
               when others =>
                  report "-----------> Wrong WB Address!" severity WARNING;               
            end case;