register3.vhd

来自「vhdl code for GIF Image Viewer」· VHDL 代码 · 共 25 行

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity register3 is
    Port (clk, reset: in std_logic;
	 			cop: in std_logic_vector (1 downto 0);
				indata: in std_logic_vector (7 downto 0);
				outdata: out std_logic_vector (7 downto 0)
	 );
end register3;

architecture Behavioral of register3 is

begin
process (clk)

begin
if (clk'EVENT and clk='1') THEN
	


end Behavioral;