jishuqi.tan.summary

用CPLD驱动数码管

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 1.489 ns
From           : rst
To             : status4[0]
From Clock     : --
To Clock       : clk1
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 7.340 ns
From           : com.0001
To             : com1[0]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.896 ns
From           : rst
To             : status4[3]
From Clock     : --
To Clock       : clk1
Failed Paths   : 0

Type           : Clock Setup: 'clk1'
Slack          : N/A
Required Time  : None
Actual Time    : 332.56 MHz ( period = 3.007 ns )
From           : status[0]
To             : status2[1]
From Clock     : clk1
To Clock       : clk1
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 372.58 MHz ( period = 2.684 ns )
From           : com.0001
To             : seg1[5]~reg0
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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