jishuqi.map.smsg

来自「用CPLD驱动数码管」· SMSG 代码 · 共 5 行

Warning (10268): Verilog HDL information at jishuqi.v(85): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at jishuqi.v(109): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at jishuqi.v(133): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at jishuqi.v(157): Always Construct contains both blocking and non-blocking assignments