beep.map.rpt

用CPLD驱动扬声器实现音乐的播放

;     -- register cascade mode                ; 0     ;
;     -- synchronous clear/load mode          ; 43    ;
;     -- asynchronous clear/load mode         ; 0     ;
;                                             ;       ;
; Total registers                             ; 48    ;
; Total logic cells in carry chains           ; 35    ;
; I/O pins                                    ; 3     ;
; Maximum fan-out node                        ; clk   ;
; Maximum fan-out                             ; 48    ;
; Total fan-out                               ; 419   ;
; Average fan-out                             ; 3.92  ;
+---------------------------------------------+-------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Resource Utilization by Entity                                                                                                                                                   ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; Compilation Hierarchy Node ; Logic Cells ; LC Registers ; UFM Blocks ; Pins ; Virtual Pins ; LUT-Only LCs ; Register-Only LCs ; LUT/Register LCs ; Carry Chain LCs ; Packed LCs ; Full Hierarchy Name ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
; |beep                      ; 104 (0)     ; 48           ; 0          ; 3    ; 0            ; 56 (0)       ; 0 (0)             ; 48 (0)           ; 35 (0)          ; 0 (0)      ; |beep               ;
;    |buzzer:inst|           ; 104 (104)   ; 48           ; 0          ; 0    ; 0            ; 56 (56)      ; 0 (0)             ; 48 (48)          ; 35 (35)         ; 0 (0)      ; |beep|buzzer:inst   ;
+----------------------------+-------------+--------------+------------+------+--------------+--------------+-------------------+------------------+-----------------+------------+---------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.


+-----------------------------------------------------------------------------------------------------------+
; State Machine - |beep|buzzer:inst|state                                                                   ;
+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
; Name      ; state.111 ; state.001 ; state.010 ; state.011 ; state.100 ; state.101 ; state.110 ; state.000 ;
+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+
; state.000 ; 0         ; 0         ; 0         ; 0         ; 0         ; 0         ; 0         ; 0         ;
; state.110 ; 0         ; 0         ; 0         ; 0         ; 0         ; 0         ; 1         ; 1         ;
; state.101 ; 0         ; 0         ; 0         ; 0         ; 0         ; 1         ; 0         ; 1         ;
; state.100 ; 0         ; 0         ; 0         ; 0         ; 1         ; 0         ; 0         ; 1         ;
; state.011 ; 0         ; 0         ; 0         ; 1         ; 0         ; 0         ; 0         ; 1         ;
; state.010 ; 0         ; 0         ; 1         ; 0         ; 0         ; 0         ; 0         ; 1         ;
; state.001 ; 0         ; 1         ; 0         ; 0         ; 0         ; 0         ; 0         ; 1         ;
; state.111 ; 1         ; 0         ; 0         ; 0         ; 0         ; 0         ; 0         ; 1         ;
+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+-----------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 48    ;
; Number of registers using Synchronous Clear  ; 43    ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 13    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Multiplexer Restructuring Statistics (Restructuring Performed)                                                                              ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------+
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output    ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------+
; 3:1                ; 4 bits    ; 8 LEs         ; 4 LEs                ; 4 LEs                  ; Yes        ; |beep|buzzer:inst|clk_div1[1] ;
; 18:1               ; 13 bits   ; 156 LEs       ; 13 LEs               ; 143 LEs                ; Yes        ; |beep|buzzer:inst|clk_div2[6] ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+-------------------------------+


+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: buzzer:inst ;
+----------------+-------+---------------------------------+
; Parameter Name ; Value ; Type                            ;
+----------------+-------+---------------------------------+
; duo            ; 3822  ; Integer                         ;
; lai            ; 3405  ; Integer                         ;
; mi             ; 3034  ; Integer                         ;
; fa             ; 2865  ; Integer                         ;
; suo            ; 2551  ; Integer                         ;
; la             ; 2273  ; Integer                         ;
; xi             ; 2024  ; Integer                         ;
; duo1           ; 1911  ; Integer                         ;
+----------------+-------+---------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Tue Nov 06 20:10:14 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off beep -c beep
Info: Found 1 design units, including 1 entities, in source file beep.bdf
    Info: Found entity 1: beep
Info: Found 1 design units, including 1 entities, in source file buzzer.v
    Info: Found entity 1: buzzer
Info: Elaborating entity "beep" for the top level hierarchy
Info: Elaborating entity "buzzer" for hierarchy "buzzer:inst"
Warning (10230): Verilog HDL assignment warning at buzzer.v(51): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(55): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(62): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(66): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(73): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(77): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(84): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(88): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(95): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(99): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(106): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(110): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(117): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(121): truncated value with size 32 to match size of target (13)
Warning (10230): Verilog HDL assignment warning at buzzer.v(128): truncated value with size 32 to match size of target (22)
Warning (10230): Verilog HDL assignment warning at buzzer.v(132): truncated value with size 32 to match size of target (13)
Info: State machine "|beep|buzzer:inst|state" contains 8 states
Info: Selected Auto state machine encoding method for state machine "|beep|buzzer:inst|state"
Info: Encoding result for state machine "|beep|buzzer:inst|state"
    Info: Completed encoding using 8 state bits
        Info: Encoded state bit "buzzer:inst|state.111"
        Info: Encoded state bit "buzzer:inst|state.001"
        Info: Encoded state bit "buzzer:inst|state.010"
        Info: Encoded state bit "buzzer:inst|state.011"
        Info: Encoded state bit "buzzer:inst|state.100"
        Info: Encoded state bit "buzzer:inst|state.101"
        Info: Encoded state bit "buzzer:inst|state.110"
        Info: Encoded state bit "buzzer:inst|state.000"
    Info: State "|beep|buzzer:inst|state.000" uses code string "00000000"
    Info: State "|beep|buzzer:inst|state.110" uses code string "00000011"
    Info: State "|beep|buzzer:inst|state.101" uses code string "00000101"
    Info: State "|beep|buzzer:inst|state.100" uses code string "00001001"
    Info: State "|beep|buzzer:inst|state.011" uses code string "00010001"
    Info: State "|beep|buzzer:inst|state.010" uses code string "00100001"
    Info: State "|beep|buzzer:inst|state.001" uses code string "01000001"
    Info: State "|beep|buzzer:inst|state.111" uses code string "10000001"
Info: Implemented 107 device resources after synthesis - the final resource count might be different
    Info: Implemented 2 input pins
    Info: Implemented 1 output pins
    Info: Implemented 104 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 16 warnings
    Info: Processing ended: Tue Nov 06 20:10:17 2007
    Info: Elapsed time: 00:00:03