tel.fit.rpt

手机号码归属地查询,代码详尽

; PCI I/O                                                            ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                                              ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                                          ; Off                            ; Off                            ;
; Auto Global Memory Control Signals                                 ; Off                            ; Off                            ;
; Auto Packed Registers                                              ; Auto                           ; Auto                           ;
; Auto Delay Chains                                                  ; On                             ; On                             ;
; Auto Merge PLLs                                                    ; On                             ; On                             ;
; Perform Physical Synthesis for Combinational Logic for Fitting     ; Off                            ; Off                            ;
; Perform Physical Synthesis for Combinational Logic for Performance ; Off                            ; Off                            ;
; Perform Register Duplication for Performance                       ; Off                            ; Off                            ;
; Perform Logic to Memory Mapping for Fitting                        ; Off                            ; Off                            ;
; Perform Register Retiming for Performance                          ; Off                            ; Off                            ;
; Perform Asynchronous Signal Pipelining                             ; Off                            ; Off                            ;
; Fitter Effort                                                      ; Auto Fit                       ; Auto Fit                       ;
; Physical Synthesis Effort Level                                    ; Normal                         ; Normal                         ;
; Logic Cell Insertion - Logic Duplication                           ; Auto                           ; Auto                           ;
; Auto Register Duplication                                          ; Auto                           ; Auto                           ;
; Auto Global Clock                                                  ; On                             ; On                             ;
; Auto Global Register Control Signals                               ; On                             ; On                             ;
; Stop After Congestion Map Generation                               ; Off                            ; Off                            ;
; Save Intermediate Fitting Results                                  ; Off                            ; Off                            ;
; Maximum number of global clocks allowed                            ; -1                             ; -1                             ;
; Maximum number of regional clocks allowed                          ; -1                             ; -1                             ;
; Maximum number of clocks of any type allowed                       ; -1                             ; -1                             ;
+--------------------------------------------------------------------+--------------------------------+--------------------------------+


+--------------------------------------------------------------------------------------------------------+
; Fitter Partition Preservation Settings                                                                 ;
+------+-------------------+---------+------------------------------+------------------------+-----------+
; Name ; # Preserved Nodes ; # Nodes ; Preservation Level Requested ; Netlist Type Used      ; Hierarchy ;
+------+-------------------+---------+------------------------------+------------------------+-----------+
; Top  ; 0                 ; 190     ; Placement and Routing        ; Post-Synthesis Netlist ;           ;
+------+-------------------+---------+------------------------------+------------------------+-----------+


+------------------------------------------+
; I/O Assignment Warnings                  ;
+----------+-------------------------------+
; Pin Name ; Reason                        ;
+----------+-------------------------------+
; reset    ; Incomplete set of assignments ;
; N1[0]    ; Incomplete set of assignments ;
; N1[1]    ; Incomplete set of assignments ;
; N1[2]    ; Incomplete set of assignments ;
; N1[3]    ; Incomplete set of assignments ;
; N2[0]    ; Incomplete set of assignments ;
; N2[1]    ; Incomplete set of assignments ;
; N2[2]    ; Incomplete set of assignments ;
; N2[3]    ; Incomplete set of assignments ;
; H3[0]    ; Incomplete set of assignments ;
; H3[1]    ; Incomplete set of assignments ;
; H3[2]    ; Incomplete set of assignments ;
; H3[3]    ; Incomplete set of assignments ;
; A[0]     ; Incomplete set of assignments ;
; A[1]     ; Incomplete set of assignments ;
; A[2]     ; Incomplete set of assignments ;
; A[3]     ; Incomplete set of assignments ;
; B[0]     ; Incomplete set of assignments ;
; B[1]     ; Incomplete set of assignments ;
; B[2]     ; Incomplete set of assignments ;
; B[3]     ; Incomplete set of assignments ;
; C[0]     ; Incomplete set of assignments ;
; C[1]     ; Incomplete set of assignments ;
; C[2]     ; Incomplete set of assignments ;
; C[3]     ; Incomplete set of assignments ;
; D[0]     ; Incomplete set of assignments ;
; D[1]     ; Incomplete set of assignments ;
; D[2]     ; Incomplete set of assignments ;
; D[3]     ; Incomplete set of assignments ;
; start    ; Incomplete set of assignments ;
; addr[0]  ; Incomplete set of assignments ;
; addr[1]  ; Incomplete set of assignments ;
; addr[2]  ; Incomplete set of assignments ;
; addr[3]  ; Incomplete set of assignments ;
; addr[4]  ; Incomplete set of assignments ;
; addr[5]  ; Incomplete set of assignments ;
; addr[6]  ; Incomplete set of assignments ;
; addr[7]  ; Incomplete set of assignments ;
; addr[8]  ; Incomplete set of assignments ;
; addr[9]  ; Incomplete set of assignments ;
; addr[10] ; Incomplete set of assignments ;
; addr[11] ; Incomplete set of assignments ;
; addr[12] ; Incomplete set of assignments ;
; addr[13] ; Incomplete set of assignments ;
; addr[14] ; Incomplete set of assignments ;
; addr[15] ; Incomplete set of assignments ;
; addr[16] ; Incomplete set of assignments ;
; addr[17] ; Incomplete set of assignments ;
; addr[18] ; Incomplete set of assignments ;
; addr[19] ; Incomplete set of assignments ;
; addr[20] ; Incomplete set of assignments ;
; addr[21] ; Incomplete set of assignments ;
; addr[22] ; Incomplete set of assignments ;
; addr[23] ; Incomplete set of assignments ;
; addr[24] ; Incomplete set of assignments ;
; addr[25] ; Incomplete set of assignments ;
; addr[26] ; Incomplete set of assignments ;
; addr[27] ; Incomplete set of assignments ;
; addr[28] ; Incomplete set of assignments ;
; addr[29] ; Incomplete set of assignments ;
; addr[30] ; Incomplete set of assignments ;
; addr[31] ; Incomplete set of assignments ;
; N3[0]    ; Incomplete set of assignments ;
; N3[1]    ; Incomplete set of assignments ;
; N3[2]    ; Incomplete set of assignments ;
; N3[3]    ; Incomplete set of assignments ;
; H2[0]    ; Incomplete set of assignments ;
; H2[1]    ; Incomplete set of assignments ;
; H2[2]    ; Incomplete set of assignments ;