msim_transcript

电子设计大赛作品_音频信号分析仪的FPGA源码(一等奖)

# -- Loading package mf_pllpack
# -- Loading entity mf_m_cntr
# -- Loading entity mf_n_cntr
# -- Loading entity stx_scale_cntr
# -- Loading entity dffp
# -- Loading entity mf_pll_reg
# -- Compiling entity mf_stratix_pll
# -- Compiling architecture vital_pll of mf_stratix_pll
# -- Compiling entity arm_m_cntr
# -- Compiling architecture behave of arm_m_cntr
# -- Compiling entity arm_n_cntr
# -- Compiling architecture behave of arm_n_cntr
# -- Compiling entity arm_scale_cntr
# -- Compiling architecture behave of arm_scale_cntr
# -- Loading entity arm_m_cntr
# -- Loading entity arm_n_cntr
# -- Loading entity arm_scale_cntr
# -- Compiling entity mf_stratixii_pll
# -- Compiling architecture vital_pll of mf_stratixii_pll
# -- Loading package std_logic_arith
# -- Loading package std_logic_unsigned
# -- Compiling entity mf_ttn_mn_cntr
# -- Compiling architecture behave of mf_ttn_mn_cntr
# -- Compiling entity mf_ttn_scale_cntr
# -- Compiling architecture behave of mf_ttn_scale_cntr
# -- Loading entity mf_ttn_mn_cntr
# -- Loading entity mf_ttn_scale_cntr
# -- Compiling entity mf_stratixiii_pll
# -- Compiling architecture vital_pll of mf_stratixiii_pll
# -- Compiling entity mf_cda_mn_cntr
# -- Compiling architecture behave of mf_cda_mn_cntr
# -- Compiling entity mf_cda_scale_cntr
# -- Compiling architecture behave of mf_cda_scale_cntr
# -- Loading entity mf_cda_mn_cntr
# -- Loading entity mf_cda_scale_cntr
# -- Compiling entity mf_cycloneiii_pll
# -- Compiling architecture vital_pll of mf_cycloneiii_pll
# -- Loading package altera_device_families
# -- Loading entity mf_stratix_pll
# -- Loading entity mf_stratixii_pll
# -- Loading entity mf_stratixiii_pll
# -- Loading entity mf_cycloneiii_pll
# -- Loading entity pll_iobuf
# -- Compiling entity altpll
# -- Compiling architecture behavior of altpll
# -- Compiling entity altaccumulate
# -- Compiling architecture behaviour of altaccumulate
# -- Compiling entity altmult_accum
# -- Compiling architecture behaviour of altmult_accum
# -- Compiling entity altmult_add
# -- Compiling architecture behaviour of altmult_add
# -- Loading package altera_common_conversion
# -- Compiling entity altfp_mult
# -- Compiling architecture behavior of altfp_mult
# -- Compiling entity altsqrt
# -- Compiling architecture behavior of altsqrt
# -- Compiling entity altclklock
# -- Compiling architecture behavior of altclklock
# -- Compiling entity altddio_in
# -- Compiling architecture behave of altddio_in
# -- Compiling entity altddio_out
# -- Compiling architecture behave of altddio_out
# -- Loading entity altddio_in
# -- Loading entity altddio_out
# -- Compiling entity altddio_bidir
# -- Compiling architecture struct of altddio_bidir
# -- Compiling entity hssi_pll
# -- Compiling architecture behavior of hssi_pll
# -- Compiling entity mf_ram7x20_syn
# -- Compiling architecture hssi_ram7x20_syn of mf_ram7x20_syn
# -- Loading entity mf_ram7x20_syn
# -- Compiling entity hssi_fifo
# -- Compiling architecture synchronizer of hssi_fifo
# -- Compiling entity hssi_rx
# -- Compiling architecture hssi_receiver of hssi_rx
# -- Compiling entity hssi_tx
# -- Compiling architecture transmitter of hssi_tx
# -- Loading entity hssi_pll
# -- Loading entity hssi_rx
# -- Loading entity hssi_fifo
# -- Compiling entity altcdr_rx
# -- Compiling architecture struct of altcdr_rx
# -- Loading entity hssi_tx
# -- Compiling entity altcdr_tx
# -- Compiling architecture struct of altcdr_tx
# -- Compiling entity stratixii_lvds_rx
# -- Compiling architecture behavior of stratixii_lvds_rx
# -- Compiling entity flexible_lvds_rx
# -- Compiling architecture behavior of flexible_lvds_rx
# -- Compiling entity stratixiii_lvds_rx
# -- Compiling architecture behavior of stratixiii_lvds_rx
# -- Loading entity altclklock
# -- Loading entity stratixii_lvds_rx
# -- Loading entity flexible_lvds_rx
# -- Loading entity stratixiii_lvds_rx
# -- Compiling entity altlvds_rx
# -- Compiling architecture behavior of altlvds_rx
# -- Compiling entity stratix_tx_outclk
# -- Compiling architecture behavior of stratix_tx_outclk
# -- Compiling entity stratixii_tx_outclk
# -- Compiling architecture behavior of stratixii_tx_outclk
# -- Compiling entity flexible_lvds_tx
# -- Compiling architecture behavior of flexible_lvds_tx
# -- Loading entity stratix_tx_outclk
# -- Loading entity stratixii_tx_outclk
# -- Loading entity flexible_lvds_tx
# -- Compiling entity altlvds_tx
# -- Compiling architecture behavior of altlvds_tx
# -- Compiling entity altcam
# -- Compiling architecture behave of altcam
# -- Compiling entity altdpram
# -- Compiling architecture behavior of altdpram
# -- Compiling entity altsyncram
# -- Compiling architecture translated of altsyncram
# -- Loading entity altsyncram
# -- Compiling entity alt3pram
# -- Compiling architecture behavior of alt3pram
# -- Compiling entity altqpram
# -- Compiling architecture behavior of altqpram
# -- Loading package altera_mf_components
# -- Compiling entity parallel_add
# -- Compiling architecture behaviour of parallel_add
# -- Compiling entity scfifo
# -- Compiling architecture behavior of scfifo
# -- Compiling package dcfifo_pack
# -- Compiling package body dcfifo_pack
# -- Loading package dcfifo_pack
# -- Compiling entity dcfifo_dffpipe
# -- Compiling architecture behavior of dcfifo_dffpipe
# -- Compiling entity dcfifo_fefifo
# -- Compiling architecture behavior of dcfifo_fefifo
# -- Loading entity dcfifo_fefifo
# -- Loading entity dcfifo_dffpipe
# -- Compiling entity dcfifo_async
# -- Compiling architecture behavior of dcfifo_async
# -- Compiling entity dcfifo_sync
# -- Compiling architecture behavior of dcfifo_sync
# -- Loading package altera_mf_hint_evaluation
# -- Compiling entity dcfifo_low_latency
# -- Compiling architecture behavior of dcfifo_low_latency
# -- Loading entity dcfifo_async
# -- Loading entity dcfifo_sync
# -- Loading entity dcfifo_low_latency
# -- Loading package dcfifo_pack
# -- Compiling entity dcfifo_mixed_widths
# -- Compiling architecture behavior of dcfifo_mixed_widths
# -- Loading entity dcfifo_mixed_widths
# -- Compiling entity dcfifo
# -- Compiling architecture behavior of dcfifo
# -- Compiling entity altshift_taps
# -- Compiling architecture behavioural of altshift_taps
# -- Compiling entity a_graycounter
# -- Compiling architecture behavior of a_graycounter
# -- Compiling entity altsquare
# -- Compiling architecture altsquare_syn of altsquare
# -- Compiling package sld_node
# -- Compiling package body sld_node
# -- Loading package sld_node
# -- Loading package sld_node
# -- Compiling entity signal_gen
# -- Compiling architecture simmodel of signal_gen
# -- Compiling entity jtag_tap_controller
# -- Compiling architecture fsm of jtag_tap_controller
# -- Compiling entity dummy_hub
# -- Compiling architecture behavior of dummy_hub
# -- Loading entity signal_gen
# -- Loading entity jtag_tap_controller
# -- Loading entity dummy_hub
# -- Compiling entity sld_virtual_jtag
# -- Compiling architecture structural of sld_virtual_jtag
# -- Compiling entity sld_signaltap
# -- Compiling architecture sim_sld_signaltap of sld_signaltap
# -- Compiling entity altstratixii_oct
# -- Compiling architecture sim_altstratixii_oct of altstratixii_oct
# -- Compiling entity altparallel_flash_loader
# -- Compiling architecture sim_altparallel_flash_loader of altparallel_flash_loader
# -- Compiling entity altserial_flash_loader
# -- Compiling architecture sim_altserial_flash_loader of altserial_flash_loader
# 
# vlib vhdl_libs/sgate
# ** Warning: (vlib-34) Library already exists at "vhdl_libs/sgate".
# vmap sgate vhdl_libs/sgate
# Modifying modelsim.ini
# vcom -93 -work sgate {c:/altera/71/quartus/eda/sim_lib/sgate_pack.vhd}
# Model Technology ModelSim SE vcom 6.2g Compiler 2007.02 Feb 21 2007
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Compiling package sgate_pack
# -- Compiling package body sgate_pack
# -- Loading package sgate_pack
# vcom -93 -work sgate {c:/altera/71/quartus/eda/sim_lib/sgate.vhd}
# Model Technology ModelSim SE vcom 6.2g Compiler 2007.02 Feb 21 2007
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package std_logic_arith
# -- Loading package std_logic_signed
# -- Compiling entity oper_add
# -- Compiling architecture sim_arch of oper_add
# -- Compiling entity oper_addsub
# -- Compiling architecture sim_arch of oper_addsub
# -- Compiling entity mux21
# -- Compiling architecture sim_arch of mux21
# -- Compiling entity io_buf_tri
# -- Compiling architecture sim_arch of io_buf_tri
# -- Compiling entity io_buf_opdrn
# -- Compiling architecture sim_arch of io_buf_opdrn
# -- Compiling entity tri_bus
# -- Compiling architecture sim_arch of tri_bus
# -- Compiling entity oper_mult
# -- Compiling architecture sim_arch of oper_mult
# -- Loading package lpm_components
# -- Compiling entity oper_div
# -- Compiling architecture sim_arch of oper_div
# -- Compiling entity oper_mod
# -- Compiling architecture sim_arch of oper_mod
# -- Loading package std_logic_unsigned
# -- Compiling entity oper_left_shift
# -- Compiling architecture sim_arch of oper_left_shift
# -- Compiling entity oper_right_shift
# -- Compiling architecture sim_arch of oper_right_shift
# -- Compiling entity oper_rotate_left
# -- Compiling architecture sim_arch of oper_rotate_left
# -- Compiling entity oper_rotate_right
# -- Compiling architecture sim_arch of oper_rotate_right
# -- Compiling entity oper_less_than
# -- Compiling architecture sim_arch of oper_less_than
# -- Loading package sgate_pack
# -- Compiling entity oper_mux
# -- Compiling architecture sim_arch of oper_mux
# -- Compiling entity oper_selector
# -- Compiling architecture sim_arch of oper_selector
# -- Compiling entity oper_prio_selector
# -- Compiling architecture sim_arch of oper_prio_selector
# -- Compiling entity oper_decoder
# -- Compiling architecture sim_arch of oper_decoder
# -- Compiling entity oper_bus_mux
# -- Compiling architecture sim_arch of oper_bus_mux
# -- Compiling entity oper_latch
# -- Compiling architecture sim_arch of oper_latch
# 
# vlib vhdl_libs/cyclone
# ** Warning: (vlib-34) Library already exists at "vhdl_libs/cyclone".
# vmap cyclone vhdl_libs/cyclone
# Modifying modelsim.ini
# vcom -93 -work cyclone {c:/altera/71/quartus/eda/sim_lib/cyclone_atoms.vhd}
# Model Technology ModelSim SE vcom 6.2g Compiler 2007.02 Feb 21 2007
# -- Loading package standard
# -- Loading package std_logic_1164
# -- Loading package vital_timing
# -- Loading package vital_primitives
# -- Compiling package cyclone_atom_pack
# -- Compiling package body cyclone_atom_pack
# -- Loading package cyclone_atom_pack
# -- Compiling package cyclone_pllpack
# -- Compiling package body cyclone_pllpack
# -- Loading package cyclone_pllpack
# -- Loading package cyclone_atom_pack
# -- Compiling entity cyclone_dffe
# -- Compiling architecture behave of cyclone_dffe
# -- Compiling entity cyclone_mux21
# -- Compiling architecture altvital of cyclone_mux21
# -- Compiling entity cyclone_mux41
# -- Compiling architecture altvital of cyclone_mux41
# -- Compiling entity cyclone_and1
# -- Compiling architecture altvital of cyclone_and1