sdram_samsung.v

三星SDRAM的verilog模型的完整源码

 *	 WRITE command									 
 *-----------------------------------------------------
 */

//always  @(write)
always  @(posedge write_event)//KyW ... 0408 for VCS
	begin:write_block 
		integer bank_id;
		reg		[8*8:1] str;

		if(CUR_TIME - TCAS_P < `tCCD-`MARGIN)
		begin
			$display("Warning: tCCD violation at %t", CUR_TIME);
			disable write_block;
		end

	`ifdef M512_X4
		c_addr = {addr[12:11],addr[`nCOL-3:0]};
	`else
	`ifdef M512_X8
		c_addr = {addr[11],addr[`nCOL-2:0]};
	`else
	`ifdef M128_M256_X4 // 98.6.30 BYC
		c_addr = {addr[11],addr[`nCOL-2:0]};
	`else
		c_addr = addr[`BIT_C];
	`endif
	`endif
	`endif
		c_bank_addr = ba;

		bank_id = BankSelect(ba);
		str = PrintBank(ba);
		r_addr = r_addr_[bank_id];

		//if(CUR_TIME - $bitstoreal(TRAS_PP[bank_id]) < `tRCD-`MARGIN)
		if ((bank_id == 0) && (CUR_TIME - TRAS_PP0 < `tRCD-`MARGIN) ||
			(bank_id == 1) && (CUR_TIME - TRAS_PP1 < `tRCD-`MARGIN) ||
			(bank_id == 2) && (CUR_TIME - TRAS_PP2 < `tRCD-`MARGIN) ||
			(bank_id == 3) && (CUR_TIME - TRAS_PP3 < `tRCD-`MARGIN))
		begin
			$display("Warning: tRCD violation at %t", CUR_TIME);
			disable write_block;
		end

		if(Mode[bank_id] == `TRUE)
		begin
			if(addr[`ADDR_AP]) 
			begin
`ifdef v			$display(">> write with auto precharge( %0s ) at 	%t",str,CUR_TIME);
`endif
				auto_flag[bank_id]  <= @(negedge pclk) `TRUE;
//`ifdef RDL2
				if (`tRDL == 2)
					wr_autoprech_reg2 <= @(negedge pclk) ba;
//`else
				else
					wr_autoprech_reg <= @(negedge pclk) ba;
//`endif
			end
			else begin
`ifdef v			$display(">> write ( %0s ) at 	%t",str,CUR_TIME);
`endif
				auto_flag[bank_id]  <= @(negedge pclk) `FALSE;
/*
				if (auto_flag == `TRUE && autoprech_reg == ba)
				  auto_flag = `FALSE;
*/
			end
		end
		else 
		begin
			$display("Warning: Illegal write command at %t",CUR_TIME);
			disable write_block;
		end

		WRITE_MODE = `TRUE;
		TCAS_P = CUR_TIME;

		m_addr = {r_addr, c_addr};

		`ifdef M16G4_M64G3
		`else
		  if( auto_flag[bank_id] )
		  begin
			if( WBL != 1)	
 				auto_flagx <= @(negedge pclk) `TRUE;
			->autostart;
		  end
		`endif

		write_task;

		WRITE_MODE <= #(`tSH) `FALSE;
        	last_rw = CUR_TIME;

		@(posedge pclk);
		if(auto_flag[bank_id]) begin
			if ({CSB_FLAG,RASB_FLAG,CASB_FLAG} == 3'b010 && bank_id === ba)
				$display($time, " Warning: For actual device, this gapless command would be illegal");
			else begin
//`ifdef RDL2
				if (`tRDL == 2)
					#0 ->wr_autoprecharge2;
//`else
				else
					->wr_autoprecharge;
//`endif
			end
		end
	end

`protect
// In bank interleave write mode, din data should be stored 
// in din register as the other bank selection occurred.

always	@(flush_write)
	begin
		if(~burst_type)
			increment_write;
		else
			interleave_write;
	end

/*
 *-----------------------------------------------------
 *	 REFRESH command								   
 *-----------------------------------------------------
 */

always	@(autorefresh)
	begin : auto_op
		if (INIT == `FALSE && MRS_SET == `FALSE) // for refersh protection during MRS_ING
		begin
			$display("Warning: Illegal refresh command at %t",CUR_TIME);
		    disable auto_op;
		end

		if (|Mode !== 1'b0) begin
			$display("Warning: Illegal refresh command at %t",CUR_TIME);
			disable auto_op;
		end

/* -- jhkim-TEST
		`ifdef M16G4_M64G3
		`else
		    for(i=0; i < `nBank; i=i+1)
		    begin
			//if( CUR_TIME - $bitstoreal(TRAS_PP[i]) < `tRFC-`MARGIN )
		if ((i == 0) && (CUR_TIME - TRAS_PP0 < `tRFC-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 < `tRFC-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 < `tRFC-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 < `tRFC-`MARGIN))
				$display("Warning: tRFC violation at %t",CUR_TIME);
		    end
		`endif
*/

		AUTOREF_MODE = `TRUE;
`ifdef v
//`ifdef NOKIA
//		if (REF16M_MODE == `TRUE) 
//			$display(">> partial auto refresh (16M) at %t",CUR_TIME);
//		else if (REF32M_MODE == `TRUE)
//			$display(">> partial auto refresh (32M) at %t",CUR_TIME);
//		else
//`endif
			$display(">> auto refresh at       %t",CUR_TIME);
`endif
/* -- jhkim-TEST
		`ifdef M16G4_M64G3
		    AUTOREF_MODE = #(`tRC) `FALSE;
		`else
		    AUTOREF_MODE = #(`tRFC) `FALSE;
		`endif
*/
`ifdef tARFC
		    AUTOREF_MODE = #(`tARFC) `FALSE;
`else
		    AUTOREF_MODE = #(`tRC) `FALSE;
`endif

	end	

/*
 *-----------------------------------------------------
 *	 SELF REFRESH command								   
 *-----------------------------------------------------
 */

always	@(selfrefresh)
	begin : self_op
		if (|Mode == 1'b0) begin
			SELFREF_MODE = `TRUE;
`ifdef v
`ifdef NOKIA
		if (REF16M_MODE == `TRUE)
			$display(">> partial self refresh (16M) enter at %t",CUR_TIME);
		else if (REF32M_MODE == `TRUE)
			$display(">> partial self refresh (32M) enter at %t",CUR_TIME);
		else
`endif
`ifdef MOBILE
		if (REF4BANK == `TRUE)
			$display(">> Partial Array Self Refresh (4banks) enter at %t",CUR_TIME);
		else if (REF2BANK == `TRUE)
			$display(">> Partial Array Self Refresh (2banks) enter at %t",CUR_TIME);
		else if (REF1BANK == `TRUE)
			$display(">> Partial Array Self Refresh (1banks) enter at %t",CUR_TIME);
		else
`endif
			$display(">> self refresh enter at         %t",CUR_TIME);
`endif
			TSELF = CUR_TIME;
		end
		else begin
			$display("Warning: Illegal self refresh command at %t",CUR_TIME);
			disable self_op;
		end

		for(i =0; i < `nBank; i = i+1)
		begin
/* -- jhkim-TEST
			`ifdef M16G4_M64G3
			  //if( CUR_TIME - $bitstoreal(TRAS_PP[i]) < `tRC-`MARGIN )
		if ((i == 0) && (CUR_TIME - TRAS_PP0 < `tRC-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 < `tRC-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 < `tRC-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 < `tRC-`MARGIN))
				$display("Warning: tRC violation at %t",CUR_TIME);
			`else
			  //if( CUR_TIME - $bitstoreal(TRAS_PP[i]) < `tRFC-`MARGIN )
		if ((i == 0) && (CUR_TIME - TRAS_PP0 < `tRFC-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 < `tRFC-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 < `tRFC-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 < `tRFC-`MARGIN))
				$display("Warning: tRFC violation at %t",CUR_TIME);
			`endif
*/
			  //if( CUR_TIME - $bitstoreal(TRAS_PP[i]) < `tRC-`MARGIN )
		if ((i == 0) && (CUR_TIME - TRAS_PP0 < `tRC-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 < `tRC-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 < `tRC-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 < `tRC-`MARGIN))
				$display("Warning: tRC violation at %t",CUR_TIME);
		end
	end	

always @(selfexit) begin
	TSEXIT = CUR_TIME;
/* -- jhkim-TEST
	`ifdef M16G4_M64G3
	  SELFREF_MODE = #(`tRC) `FALSE;
	`else
	  SELFREF_MODE = #(`tRFC) `FALSE;
	`endif
*/
`ifdef tSRFX
		    SELFREF_MODE = #(`tSRFX) `FALSE;
`else
		    SELFREF_MODE = #(`tRC) `FALSE;
`endif
end

/*
always @(negedge cke) begin
	if (SELFREF_MODE == `TRUE && POWERDOWN_MODE == `FALSE) begin
		if (CUR_TIME - TSEXIT < `tSRX-`MARGIN)
			$display("Warning: tSRX violation at %t", CUR_TIME);
	end
end
*/
`endprotect

/*
 *-----------------------------------------------------
 *	 PRECHARGE command								 
 *-----------------------------------------------------
 */

// precharge command performs to disable active operation.

always	@(precharge)
	begin : prech_op
		integer bank_id;
		integer i;
		reg		[8*8:1] str;
		reg		[8*8:1] str1;

		`ifdef NBANK4
		  bank_id = BankSelect(prech_reg[2:1]);
		  str = PrintBank(prech_reg[2:1]);
		`endif
		`ifdef NBANK2
		  bank_id = BankSelect(prech_reg[1]);
		  str = PrintBank(prech_reg[1]);
	    	`endif
`protect

		if(prech_reg[0] == `FALSE)
		begin

		   if(Mode[bank_id] !== 1'b0)
		   begin

                        //if(CUR_TIME - $bitstoreal(TRAS_PP[bank_id]) < `tRASmin-`MARGIN)
		if ((bank_id == 0) && (CUR_TIME - TRAS_PP0 < `tRASmin-`MARGIN) ||
			(bank_id == 1) && (CUR_TIME - TRAS_PP1 < `tRASmin-`MARGIN) ||
			(bank_id == 2) && (CUR_TIME - TRAS_PP2 < `tRASmin-`MARGIN) ||
			(bank_id == 3) && (CUR_TIME - TRAS_PP3 < `tRASmin-`MARGIN))
                        begin
                                $display("Warning: tRASmin violation( %0s ) at %t", str, CUR_TIME);
                                disable prech_op;
                        end

                        //if(first_pre[bank_id]==`FALSE && CUR_TIME - $bitstoreal(TRAS_PP[bank_id]) > `tRASmax+`MARGIN)
		if (first_pre[bank_id]==`FALSE && ((bank_id == 0) && (CUR_TIME - TRAS_PP0 > `tRASmax-`MARGIN) ||
			(bank_id == 1) && (CUR_TIME - TRAS_PP1 > `tRASmax-`MARGIN) ||
			(bank_id == 2) && (CUR_TIME - TRAS_PP2 > `tRASmax-`MARGIN) ||
			(bank_id == 3) && (CUR_TIME - TRAS_PP3 > `tRASmax-`MARGIN)))
                                $display("Warning: tRASmax violation( %0s ) at %t", str, CUR_TIME);

                        first_pre[bank_id] = `FALSE;

				md = Mode;
				md[bank_id] = 0;
				Mode = md;
`ifdef v			$display(">> precharge ( %0s ) at	%t", str, CUR_TIME);
`endif
		    end

		    else
		    begin
`ifdef v			$display("-- current precharge command is NOP at %t",CUR_TIME);
`endif
				disable prech_op;
		    end

			precharge_flag[bank_id] = `TRUE;
			kill_bank = bank_id;
			->precharge_flag_kill;
			//TPRE_P[bank_id] = $realtobits(CUR_TIME);
			case(bank_id)//TPRE_P
				'd0:	TPRE_P0 = CUR_TIME;
				'd1:	TPRE_P1 = CUR_TIME;
				'd2:	TPRE_P2 = CUR_TIME;
				'd3:	TPRE_P3 = CUR_TIME;
			endcase//TPRE_P
		end
	
		else
		begin
			if(|Mode[`nBank-1:0] !== 1'b0)  // BYC
			begin

		        for(i = 0; i < `nBank; i = i+1)
                        begin
                                        case(i)
                                                'd0 :
                                                        str1 = " A Bank";
                                                'd2 :
                                                        str1 = " B Bank";
                                                'd1 :
                                                        str1 = " C Bank";
                                                'd3 :
                                                        str1 = " D Bank";
                                                default :
                                                        str1 = "Bad Bank";
                                        endcase

                                //if(Mode[i] !== 1'b0 && CUR_TIME - $bitstoreal(TRAS_PP[i]) < `tRASmin-`MARGIN)
		if (Mode[i] !== 1'b0 && ((i == 0) && (CUR_TIME - TRAS_PP0 < `tRASmin-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 < `tRASmin-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 < `tRASmin-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 < `tRASmin-`MARGIN)))
                                begin
                                        $display("Warning: tRASmin violation ( %0s ) at %t", str1, CUR_TIME);
                                        disable prech_op;
                                end

                                //if(Mode[i] !== 1'b0 && first_pre[i]==`FALSE && CUR_TIME - $bitstoreal(TRAS_PP[i]) > `tRASmax+`MARGIN)
		if (Mode[i] !== 1'b0 && first_pre[i]==`FALSE && ((i == 0) && (CUR_TIME - TRAS_PP0 > `tRASmax-`MARGIN) ||
			(i == 1) && (CUR_TIME - TRAS_PP1 > `tRASmax-`MARGIN) ||
			(i == 2) && (CUR_TIME - TRAS_PP2 > `tRASmax-`MARGIN) ||
			(i == 3) && (CUR_TIME - TRAS_PP3 > `tRASmax-`MARGIN)))
                                        $display("Warning: tRASmax violation ( %0s ) at %t", str1, CUR_TIME);

                                first_pre[i] = `FALSE;

                                Mode[i] = 1'b0;
                                precharge_flag[i] = `TRUE;
                                //TPRE_P[i] = $realtobits(CUR_TIME);
			case(i)//TPRE_P
				'd0:	TPRE_P0 = CUR_TIME;
				'd1:	TPRE_P1 = CUR_TIME;
				'd2:	TPRE_P2 = CUR_TIME;
				'd3:	TPRE_P3 = CUR_TIME;
			endcase//TPRE_P
                                first_pre[i] = `FALSE;
                        end
			
			`ifdef NBANK2
`ifdef v			$display(">> precharge ( A and B bank ) at 	%t",CUR_TIME);
`endif
			`endif
			`ifdef NBANK4
`ifdef v			$display(">> precharge ( A,B,C, and D bank ) at 	%t",CUR_TIME);
`endif
			`endif
			end

			else
			begin
`ifdef v			$display("-- current precharge command is NOP at %t",CUR_TIME);
`endif
				disable prech_op;
			end

			kill_bank = bank_id;
			->precharge_flag_kill;

		end
		->precharge_start;
	end
`endprotect

/*
 *-----------------------------------------------------
 *	 tRDL=2 AUTO PRECHARGE command	 
 *-----------------------------------------------------
 */

always @(wr_autoprecharge2) begin
	wr_autoprech_reg = wr_autoprech_reg2;
	@(posedge pclk);
	if ({CSB_FLAG,RASB_FLAG,CASB_FLAG} == 3'b010 && wr_autoprech_reg === ba)
		$display($time, " Warning: For actual device, this 1-clk-gap command would be illegal");
	else
		->wr_autoprecharge;
end

/*
 *-----------------------------------------------------
 *	 READ AUTO PRECHARGE command								 
 *-----------------------------------------------------
 */

always	@(rd_autoprecharge or posedge rd_reautoprecharge)
begin : rd_autoprech_op
real difftime;
integer bank_id;
reg		[8*8:1] str;
reg		tmp_reauto;
integer	prev_bank;
integer tmp_bank;

	tmp_reauto = `FALSE;
	bank_id = BankSelect(rd_autoprech_reg);
	if (rd_reautoprecharge == `TRUE) begin
		rd_reautoprecharge = `FALSE;
		tmp_bank = prev_bank;
	end
	else
		tmp_bank = bank_id;
	str = PrintBank(tmp_bank);
	//difftime = $realtime - $bitstoreal(TRAS_PP[tmp_bank]);
			case(tmp_bank)//TRAS_PP
				'd0:	difftime = $realtime-TRAS_PP0;
				'd1:	difftime = $realtime-TRAS_PP1;
				'd2:	difftime = $realtime-TRAS_PP2;
				'd3:	difftime = $realtime-TRAS_PP3;
			endcase//TRAS_PP
	if(difftime < `tRASmin-`MARGIN)
	begin
	  `ifdef M64G3_M128_M256
		//auto_flagx <= `TRUE;				// KyW ... 0624 : rev 3.3
		//auto_flagx <= #(`tRASmin-difftime) `FALSE;	// KyW ... 0624 : rev 3.3
		  prev_bank <= #(`tRASmin-difftime) tmp_bank;
		  rd_reautoprecharge <= #(`tRASmin-difftime) `TRUE;
		  tmp_reauto = `TRUE;
`ifdef v	  $display(" Info: Staring Auto precharge (%s) delayed by tRASmin violation at %t", str, $time);
`endif
//		  #0 disable rd_autoprech_op;
	  `else
		rd_reautoprecharge = `