lcdfinal.map.qmsg

来自「用状态机实现密码锁State machine used to achieve c」· QMSG 代码 · 共 134 行 · 第 1/5 页

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[3\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[3\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[4\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[4\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[5\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[5\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[6\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[6\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[7\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[7\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "LEDG\[8\] LCD_TEST_initial.v(103) " "Info (10041): Inferred latch for \"LEDG\[8\]\" at LCD_TEST_initial.v(103)" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 103 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "LCD_Controller LCD_TEST_initial:u0\|LCD_Controller:u0 " "Info: Elaborating entity \"LCD_Controller\" for hierarchy \"LCD_TEST_initial:u0\|LCD_Controller:u0\"" {  } { { "LCD_TEST_initial.v" "u0" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 382 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 LCD_Controller.v(70) " "Warning (10230): Verilog HDL assignment warning at LCD_Controller.v(70): truncated value with size 32 to match size of target (5)" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 70 0 0 } }  } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_INPUT_PORT_TOO_NARROW" "led_ctrl u0 18 5 " "Warning (12020): Port \"led_ctrl\" on the entity instantiation of \"u0\" is connected to a signal of width 18. The formal width of the signal in the module is 5.  Extra bits will be ignored." {  } { { "lcdfinal.v" "u0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 132 0 0 } }  } 0 12020 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be ignored." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_INPUT_PORT_TOO_WIDE" "password u0 1 16 " "Warning (12010): Port \"password\" on the entity instantiation of \"u0\" is connected to a signal of width 1. The formal width of the signal in the module is 16.  Extra bits will be driven by GND." {  } { { "lcdfinal.v" "u0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 132 0 0 } }  } 0 12010 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be driven by GND." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_INPUT_PORT_TOO_WIDE" "try_count u0 1 2 " "Warning (12010): Port \"try_count\" on the entity instantiation of \"u0\" is connected to a signal of width 1. The formal width of the signal in the module is 2.  Extra bits will be driven by GND." {  } { { "lcdfinal.v" "u0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 132 0 0 } }  } 0 12010 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be driven by GND." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "main_state p0 1 3 " "Warning (12030): Port \"main_state\" on the entity instantiation of \"p0\" is connected to a signal of width 1. The formal width of the signal in the module is 3.  Extra bits will be left dangling without any fanout logic." {  } { { "lcdfinal.v" "p0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 107 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be left dangling without any fanout logic." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "password p0 1 16 " "Warning (12030): Port \"password\" on the entity instantiation of \"p0\" is connected to a signal of width 1. The formal width of the signal in the module is 16.  Extra bits will be left dangling without any fanout logic." {  } { { "lcdfinal.v" "p0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 107 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be left dangling without any fanout logic." 0 0 "" 0 0}
{ "Warning" "WSGN_WIDTH_MISMATCH_OUTPUT_PORT" "try_count p0 1 2 " "Warning (12030): Port \"try_count\" on the entity instantiation of \"p0\" is connected to a signal of width 1. The formal width of the signal in the module is 2.  Extra bits will be left dangling without any fanout logic." {  } { { "lcdfinal.v" "p0" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 107 0 0 } }  } 0 12030 "Port \"%1!s!\" on the entity instantiation of \"%2!s!\" is connected to a signal of width %3!d!. The formal width of the signal in the module is %4!d!.  Extra bits will be left dangling without any fanout logic." 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "LCD_XX\[2\] data_in GND " "Warning (14130): Reduced register \"LCD_XX\[2\]\" with stuck data_in port to stuck value GND" {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 113 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "LCD_XX\[1\] data_in GND " "Warning (14130): Reduced register \"LCD_XX\[1\]\" with stuck data_in port to stuck value GND" {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 113 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST 4 " "Info: State machine \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST\" contains 4 states" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST 4 " "Info: State machine \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST\" contains 4 states" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_PREPROCESS_STAT_NO_BITS" "\|lcdfinal\|passed_lock:p0\|sub_state 5 " "Info: State machine \"\|lcdfinal\|passed_lock:p0\|sub_state\" contains 5 states" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State machine \"%1!s!\" contains %2!d! states" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST " "Info: Selected Auto state machine encoding method for state machine \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST " "Info: Encoding result for state machine \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|mLCD_ST.000011 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|mLCD_ST.000011\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|mLCD_ST.000010 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|mLCD_ST.000010\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|mLCD_ST.000001 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|mLCD_ST.000001\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|mLCD_ST.000000 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|mLCD_ST.000000\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000000 0000 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000000\" uses code string \"0000\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000001 0011 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000001\" uses code string \"0011\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000010 0101 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000010\" uses code string \"0101\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000011 1001 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|mLCD_ST.000011\" uses code string \"1001\"" {  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0}  } { { "LCD_TEST_initial.v" "" { Text "F:/jeffie/final/STATE2/LCD_TEST_initial.v" 24 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST " "Info: Selected Auto state machine encoding method for state machine \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST " "Info: Encoding result for state machine \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "4 " "Info: Completed encoding using 4 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.11 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.11\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.10 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.10\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.01 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.01\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.00 " "Info: Encoded state bit \"LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.00\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.00 0000 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.00\" uses code string \"0000\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.01 0011 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.01\" uses code string \"0011\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.10 0101 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.10\" uses code string \"0101\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.11 1001 " "Info: State \"\|lcdfinal\|LCD_TEST_initial:u0\|LCD_Controller:u0\|ST.11\" uses code string \"1001\"" {  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0}  } { { "LCD_Controller.v" "" { Text "F:/jeffie/final/STATE2/LCD_Controller.v" 27 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|lcdfinal\|passed_lock:p0\|sub_state " "Info: Selected Auto state machine encoding method for state machine \"\|lcdfinal\|passed_lock:p0\|sub_state\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Selected %1!s! state machine encoding method for state machine \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|lcdfinal\|passed_lock:p0\|sub_state " "Info: Encoding result for state machine \"\|lcdfinal\|passed_lock:p0\|sub_state\"" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "5 " "Info: Completed encoding using 5 state bits" { { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "passed_lock:p0\|sub_state.fourth " "Info: Encoded state bit \"passed_lock:p0\|sub_state.fourth\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "passed_lock:p0\|sub_state.third " "Info: Encoded state bit \"passed_lock:p0\|sub_state.third\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "passed_lock:p0\|sub_state.second " "Info: Encoded state bit \"passed_lock:p0\|sub_state.second\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "passed_lock:p0\|sub_state.first " "Info: Encoded state bit \"passed_lock:p0\|sub_state.first\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_BITS" "passed_lock:p0\|sub_state.finish " "Info: Encoded state bit \"passed_lock:p0\|sub_state.finish\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoded state bit \"%1!s!\"" 0 0 "" 0 0}  } {  } 0 0 "Completed encoding using %1!d! state bits" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|passed_lock:p0\|sub_state.first 00000 " "Info: State \"\|lcdfinal\|passed_lock:p0\|sub_state.first\" uses code string \"00000\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|passed_lock:p0\|sub_state.second 00110 " "Info: State \"\|lcdfinal\|passed_lock:p0\|sub_state.second\" uses code string \"00110\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|passed_lock:p0\|sub_state.third 01010 " "Info: State \"\|lcdfinal\|passed_lock:p0\|sub_state.third\" uses code string \"01010\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|passed_lock:p0\|sub_state.fourth 10010 " "Info: State \"\|lcdfinal\|passed_lock:p0\|sub_state.fourth\" uses code string \"10010\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0} { "Info" "IOPT_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|lcdfinal\|passed_lock:p0\|sub_state.finish 00011 " "Info: State \"\|lcdfinal\|passed_lock:p0\|sub_state.finish\" uses code string \"00011\"" {  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "State \"%1!s!\" uses code string \"%2!s!\"" 0 0 "" 0 0}  } { { "passed_lock.v" "" { Text "F:/jeffie/final/STATE2/passed_lock.v" 56 -1 0 } }  } 0 0 "Encoding result for state machine \"%1!s!\"" 0 0 "" 0 0}
{ "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC_HDR" "" "Warning: The following nodes have both tri-state and non-tri-state drivers" { { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[0\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[0\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 0} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[1\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[1\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 0} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[2\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[2\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 0} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[3\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[3\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 0} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[4\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[4\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state driver." 0 0 "" 0 0} { "Warning" "WOPT_OPT_INSERTED_ALWAYS_ENABLED_TRI_AFTER_LOGIC" "LCD_DATA\[5\] " "Warning: Inserted always-enabled tri-state buffer between \"LCD_DATA\[5\]\" and its non-tri-state driver." {  } { { "lcdfinal.v" "" { Text "F:/jeffie/final/STATE2/lcdfinal.v" 26 -1 0 } }  } 0 0 "Inserted always-enabled tri-state buffer between \"%1!s!\" and its non-tri-state dri