cpu.fit.eqn

rs422协议的通讯程序.做一些简单改动即可以移植到各种环境。

--B1_st[3] is do_adc:u_ad|st[3] at LC4_E10
--operation mode is normal

B1_st[3]_lut_out = B1_st[3] & B1L541 & B1L651 # !B1L541 & B1L941 # !B1_st[3] & B1L541;
B1_st[3] = DFFEA(B1_st[3]_lut_out, GLOBAL(p12mhz), rst, , , , );


--B1L431 is do_adc:u_ad|Mux~715 at LC7_E36
--operation mode is normal

B1L431 = !B1_st[1] & !B1_st[3] & B1_st[0] $ !B1_st[2];


--B1L841 is do_adc:u_ad|Mux~1961 at LC1_E36
--operation mode is normal

B1L841 = B1_st[2] & !B1_st[3];


--P1L71 is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[7]~1 at LC2_E36
--operation mode is normal

P1L71 = B1_st[0] & B1L841 & !B1_st[1] # !B1L431;


--B1L851 is do_adc:u_ad|reduce_nor~0 at LC3_C30
--operation mode is normal

B1L851 = !M4_data_out[2] & !M4_data_out[1] & !M4_data_out[0] & C1L03;


--B1_t_can_con_adc_end is do_adc:u_ad|t_can_con_adc_end at LC2_E7
--operation mode is normal

B1_t_can_con_adc_end_lut_out = B1L731;
B1_t_can_con_adc_end = DFFEA(B1_t_can_con_adc_end_lut_out, GLOBAL(p12mhz), rst, , B1L531, , );


--B1L861 is do_adc:u_ad|setup_adc_tag~0 at LC1_E30
--operation mode is normal

B1L861 = B1_t_can_con_adc_end # !rst;


--B1L071 is do_adc:u_ad|setup_adc_tag~40 at LC5_C30
--operation mode is normal

B1L071 = A1L151 # M4_data_out[2] # M4_data_out[1] # !M4_data_out[0];


--B1L171 is do_adc:u_ad|setup_adc_tag~41 at LC6_C30
--operation mode is normal

B1L171 = B1L071 # !A1L5 # !A1L23 # !A1L65;


--H1L3 is time_out:u_time_out|reduce_nor~178 at LC8_B19
--operation mode is normal

H1L3 = !A1L811 & !A1L201 & !A1L531 & !A1L97;


--B1L961 is do_adc:u_ad|setup_adc_tag~1 at LC1_C30
--operation mode is normal

B1L961 = !B1L171 & C1L03 & H1L3;


--N1_st[0] is do_adc:u_ad|sig_adc:u_sig_adc|st[0] at LC1_F32
--operation mode is normal

N1_st[0]_lut_out = N1_st[3] & N1L221 # N1L521 # !N1_st[3] & N1L59;
N1_st[0] = DFFEA(N1_st[0]_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_st[2] is do_adc:u_ad|sig_adc:u_sig_adc|st[2] at LC4_E20
--operation mode is normal

N1_st[2]_lut_out = N1L721 # N1L921 & N1L65 # !N1_st[2];
N1_st[2] = DFFEA(N1_st[2]_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_st[3] is do_adc:u_ad|sig_adc:u_sig_adc|st[3] at LC2_E23
--operation mode is normal

N1_st[3]_lut_out = N1_st[4] & N1L331 # !N1_st[4] & N1L831;
N1_st[3] = DFFEA(N1_st[3]_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_st[4] is do_adc:u_ad|sig_adc:u_sig_adc|st[4] at LC1_E27
--operation mode is normal

N1_st[4]_lut_out = N1_st[4] & N1L931 # N1L141 # !N1_st[4] & N1L95;
N1_st[4] = DFFEA(N1_st[4]_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_st[1] is do_adc:u_ad|sig_adc:u_sig_adc|st[1] at LC1_E19
--operation mode is normal

N1_st[1]_lut_out = N1_st[4] & N1L341 # !N1_st[4] & N1L39;
N1_st[1] = DFFEA(N1_st[1]_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1L57 is do_adc:u_ad|sig_adc:u_sig_adc|Mux~1012 at LC1_E28
--operation mode is normal

N1L57 = N1_st[4] $ N1_st[1];


--N1L811 is do_adc:u_ad|sig_adc:u_sig_adc|Mux~16574 at LC3_E28
--operation mode is normal

N1L811 = !N1_st[0] & !N1_st[2] & !N1_st[3] & !N1L57;


--N1L42 is do_adc:u_ad|sig_adc:u_sig_adc|ad_data[7]~59 at LC5_E28
--operation mode is normal

N1L42 = !N1_st[3] & !N1_st[0] & !N1_st[4];


--N1L911 is do_adc:u_ad|sig_adc:u_sig_adc|Mux~16575 at LC5_E27
--operation mode is normal

N1L911 = N1_st[2] & !N1_st[1];


--N1L021 is do_adc:u_ad|sig_adc:u_sig_adc|Mux~16577 at LC2_F32
--operation mode is normal

N1L021 = N1_st[0] & N1_st[1];


--C1L82 is generate_int:u_int|reduce_nor~4 at LC5_B7
--operation mode is normal

C1L82 = C1_cnt_urgency_put[0] # !C1_cnt_urgency_put[1] # !C1L63;


--C1L31 is generate_int:u_int|cnt_urgency_put[1]~303 at LC8_B7
--operation mode is normal

C1L31 = !C1_cnt_urgency_put[3] & !C1_cnt_urgency_put[2];


--C1L91 is generate_int:u_int|LessThan~23 at LC2_B7
--operation mode is normal

C1L91 = C1L31 & !C1_cnt_urgency_put[1] # !C1_cnt_urgency_put[4] # !C1_cnt_urgency_put[5];


--D1_p1khz is gen_1mhz:u_p1mhz|p1khz at LC1_C27
--operation mode is normal

D1_p1khz_lut_out = !D1_p1khz;
D1_p1khz = DFFEA(D1_p1khz_lut_out, GLOBAL(D1_P1MHz), , , D1L6, , );


--C1L81 is generate_int:u_int|cnt_urgency_put_tag~0 at LC2_B10
--operation mode is normal

C1L81 = !C1_urgency_put_tag # !rst;


--T9_cs_buffer[4] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC6_B8
--operation mode is arithmetic

T9_cs_buffer[4] = C1_cnt_urgency_put[4] $ T9_cout[3];

--T9_cout[4] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[4] at LC6_B8
--operation mode is arithmetic

T9_cout[4] = CARRY(C1_cnt_urgency_put[4] & T9_cout[3]);


--T9_cs_buffer[3] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC5_B8
--operation mode is arithmetic

T9_cs_buffer[3] = C1_cnt_urgency_put[3] $ T9_cout[2];

--T9_cout[3] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[3] at LC5_B8
--operation mode is arithmetic

T9_cout[3] = CARRY(C1_cnt_urgency_put[3] & T9_cout[2]);


--T9_cs_buffer[2] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC4_B8
--operation mode is arithmetic

T9_cs_buffer[2] = C1_cnt_urgency_put[2] $ T9_cout[1];

--T9_cout[2] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[2] at LC4_B8
--operation mode is arithmetic

T9_cout[2] = CARRY(C1_cnt_urgency_put[2] & T9_cout[1]);


--C1_urgency_put_tag_end is generate_int:u_int|urgency_put_tag_end at LC3_B10
--operation mode is normal

C1_urgency_put_tag_end_lut_out = VCC;
C1_urgency_put_tag_end = DFFEA(C1_urgency_put_tag_end_lut_out, D1_p1khz, !C1L81, , C1L14, , );


--C1L53 is generate_int:u_int|setup_urgency_put_tag~0 at LC5_B10
--operation mode is normal

C1L53 = C1_urgency_put_tag_end # !rst;


--T9_cs_buffer[1] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC3_B8
--operation mode is arithmetic

T9_cs_buffer[1] = C1_cnt_urgency_put[1] $ T9_cout[0];

--T9_cout[1] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[1] at LC3_B8
--operation mode is arithmetic

T9_cout[1] = CARRY(C1_cnt_urgency_put[1] & T9_cout[0]);


--C1L92 is generate_int:u_int|reduce_nor~5 at LC1_F24
--operation mode is normal

C1L92 = C1_cnt_ready_reset[0] # !C1_cnt_ready_reset[1] # !C1L12;


--C1L4 is generate_int:u_int|cnt_ready_reset[1]~303 at LC2_F24
--operation mode is normal

C1L4 = !C1_cnt_ready_reset[3] & !C1_cnt_ready_reset[2];


--C1L02 is generate_int:u_int|LessThan~47 at LC3_F24
--operation mode is normal

C1L02 = C1L4 & !C1_cnt_ready_reset[1] # !C1_cnt_ready_reset[4] # !C1_cnt_ready_reset[5];


--C1L9 is generate_int:u_int|cnt_ready_reset_tag~0 at LC3_F23
--operation mode is normal

C1L9 = !C1_ready_reset_tag # !rst;


--T21_cs_buffer[4] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC7_F35
--operation mode is arithmetic

T21_cs_buffer[4] = C1_cnt_ready_reset[4] $ T21_cout[3];

--T21_cout[4] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cout[4] at LC7_F35
--operation mode is arithmetic

T21_cout[4] = CARRY(C1_cnt_ready_reset[4] & T21_cout[3]);


--T21_cs_buffer[3] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC6_F35
--operation mode is arithmetic

T21_cs_buffer[3] = C1_cnt_ready_reset[3] $ T21_cout[2];

--T21_cout[3] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cout[3] at LC6_F35
--operation mode is arithmetic

T21_cout[3] = CARRY(C1_cnt_ready_reset[3] & T21_cout[2]);


--T21_cs_buffer[2] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC5_F35
--operation mode is arithmetic

T21_cs_buffer[2] = C1_cnt_ready_reset[2] $ T21_cout[1];

--T21_cout[2] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cout[2] at LC5_F35
--operation mode is arithmetic

T21_cout[2] = CARRY(C1_cnt_ready_reset[2] & T21_cout[1]);


--C1_ready_reset_tag_end is generate_int:u_int|ready_reset_tag_end at LC4_F23
--operation mode is normal

C1_ready_reset_tag_end_lut_out = VCC;
C1_ready_reset_tag_end = DFFEA(C1_ready_reset_tag_end_lut_out, !D1_p1khz, !C1L9, , C1L62, , );


--C1L43 is generate_int:u_int|setup_ready_reset_tag~0 at LC5_F23
--operation mode is normal

C1L43 = C1_ready_reset_tag_end # !rst;


--T21_cs_buffer[1] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC4_F35
--operation mode is arithmetic

T21_cs_buffer[1] = C1_cnt_ready_reset[1] $ T21_cout[0];

--T21_cout[1] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cout[1] at LC4_F35
--operation mode is arithmetic

T21_cout[1] = CARRY(C1_cnt_ready_reset[1] & T21_cout[0]);


--M3_data_out[4] is write_reg:u_read_write|wri_reg8:u_a3_reg|data_out[4] at LC2_C1
--operation mode is normal

M3_data_out[4]_lut_out = A1L201;
M3_data_out[4] = DFFEA(M3_data_out[4]_lut_out, GLOBAL(iow), rst, , E1L6, , );


--E1L4 is write_reg:u_read_write|reduce_nor~0 at LC4_C30
--operation mode is normal

E1L4 = !M4_data_out[0] & M4_data_out[1] & M4_data_out[2] & C1L03;


--E1L5 is write_reg:u_read_write|reduce_nor~1 at LC3_B6
--operation mode is normal

E1L5 = !M4_data_out[1] & M4_data_out[0] & M4_data_out[2] & C1L03;


--M6_data_out[3] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[3] at LC1_D9
--operation mode is normal

M6_data_out[3]_lut_out = A1L97;
M6_data_out[3] = DFFEA(M6_data_out[3]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--M6_data_out[4] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[4] at LC5_D9
--operation mode is normal

M6_data_out[4]_lut_out = A1L201;
M6_data_out[4] = DFFEA(M6_data_out[4]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--M6_data_out[5] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[5] at LC3_D9
--operation mode is normal

M6_data_out[5]_lut_out = A1L811;
M6_data_out[5] = DFFEA(M6_data_out[5]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--P01L11 is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[4]~15 at LC7_F2
--operation mode is normal

P01L11 = !P01_q[4] & !P01_q[3] # !P01_q[2];


--U4_data_clk is tx8:u_tx8|data_clk:u_data_clk|data_clk at LC8_F2
--operation mode is normal

U4_data_clk_lut_out = !U4_data_clk;
U4_data_clk = DFFEA(U4_data_clk_lut_out, GLOBAL(D1_P1MHz), !U4L31, , U4L91, , );


--K1L8 is tx8:u_tx8|reduce_nor~1 at LC6_C35
--operation mode is normal

K1L8 = !M4_data_out[2] & M4_data_out[0] & M4_data_out[1] & K1L01;


--K1_end_tx is tx8:u_tx8|end_tx at LC6_F2
--operation mode is normal

K1_end_tx_lut_out = VCC;
K1_end_tx = DFFEA(K1_end_tx_lut_out, !U4_data_clk, !U4L31, , K1L9, , );


--K1L7 is tx8:u_tx8|process0~0 at LC6_F6
--operation mode is normal

K1L7 = K1_end_tx # !rst;


--D1_P1MHz is gen_1mhz:u_p1mhz|P1MHz at LC1_D10
--operation mode is normal

D1_P1MHz_lut_out = !D1_P1MHz;
D1_P1MHz = DFFEA(D1_P1MHz_lut_out, GLOBAL(p12mhz), , , D1L8, , );


--U3_clk_cnt[8] is read_return_pre_set:u_rx_tx|tx16:u_tx|data_clk:u_data_clk|clk_cnt[8] at LC6_B5
--operation mode is normal

U3_clk_cnt[8]_lut_out = T42_cs_buffer[8];
U3_clk_cnt[8] = DFFEA(U3_clk_cnt[8]_lut_out, GLOBAL(D1_P1MHz), !W1L61, , U3L31, , );


--U3_clk_cnt[9] is read_return_pre_set:u_rx_tx|tx16:u_tx|data_clk:u_data_clk|clk_cnt[9] at LC7_B5
--operation mode is normal

U3_clk_cnt[9]_lut_out = R8_unreg_res_node[9];
U3_clk_cnt[9] = DFFEA(U3_clk_cnt[9]_lut_out, GLOBAL(D1_P1MHz), !W1L61, , U3L31, , );


--U3_clk_cnt[7] is read_return_pre_set:u_rx_tx|tx16:u_tx|data_clk:u_data_clk|clk_cnt[7] at LC2_B4
--operation mode is normal

U3_clk_cnt[7]_lut_out = T42_cs_buffer[7] & U3L31;
U3_clk_cnt[7] = DFFEA(U3_clk_cnt[7]_lut_out, GLOBAL(D1_P1MHz), !W1L61, , A1L352, , );


--U3_clk_cnt[6] is read_return_pre_set:u_rx_tx|tx16:u_tx|data_clk:u_data_clk|clk_cnt[6] at LC5_B4
--operation mode is normal

U3_clk_cnt[6]_lut_out = T42_cs_buffer[6] & U3L31;
U3_clk_cnt[6] = DFFEA(U3_clk_cnt[6]_lut_out, GLOBAL(D1_P1MHz), !W1L61, , A1L352, , );


--U3_clk_cnt[5] is read_return_pre_set:u_rx_tx|tx16:u_tx|data_clk:u_data_clk|clk_cnt[5] at LC8_B5
--operation mode is normal