cpu.fit.eqn

rs422协议的通讯程序.做一些简单改动即可以移植到各种环境。

--M4_data_out[3] is write_reg:u_read_write|wri_reg8:u_adr|data_out[3] at LC3_B35
--operation mode is normal

M4_data_out[3]_lut_out = A1L97;
M4_data_out[3] = DFFEA(M4_data_out[3]_lut_out, !ale, rst, , , , );


--M4_data_out[2] is write_reg:u_read_write|wri_reg8:u_adr|data_out[2] at LC7_C31
--operation mode is normal

M4_data_out[2]_lut_out = A1L65;
M4_data_out[2] = DFFEA(M4_data_out[2]_lut_out, !ale, rst, , , , );


--M4_data_out[1] is write_reg:u_read_write|wri_reg8:u_adr|data_out[1] at LC5_C31
--operation mode is normal

M4_data_out[1]_lut_out = A1L23;
M4_data_out[1] = DFFEA(M4_data_out[1]_lut_out, !ale, rst, , , , );


--M4_data_out[0] is write_reg:u_read_write|wri_reg8:u_adr|data_out[0] at LC3_C31
--operation mode is normal

M4_data_out[0]_lut_out = A1L5;
M4_data_out[0] = DFFEA(M4_data_out[0]_lut_out, !ale, rst, , , , );


--M3_data_out[3] is write_reg:u_read_write|wri_reg8:u_a3_reg|data_out[3] at LC1_A26
--operation mode is normal

M3_data_out[3]_lut_out = A1L97;
M3_data_out[3] = DFFEA(M3_data_out[3]_lut_out, GLOBAL(iow), rst, , E1L6, , );


--A1L442 is reduce_nor~106 at LC4_B14
--operation mode is normal

A1L442 = sa_h[15] & sa_h[14] & !M4_data_out[7] & !M4_data_out[6];


--A1L542 is reduce_nor~107 at LC5_B14
--operation mode is normal

A1L542 = !sa_h[10] & !sa_h[8] & !sa_h[12] & !sa_h[11];


--A1L642 is reduce_nor~108 at LC7_B14
--operation mode is normal

A1L642 = A1L442 & A1L542 & !sa_h[13] & !sa_h[9];


--A1L742 is reduce_nor~109 at LC2_B35
--operation mode is normal

A1L742 = M4_data_out[4] & A1L642 & !M4_data_out[3] & !M4_data_out[5];


--A1L142 is reduce_nor~1 at LC8_B9
--operation mode is normal

A1L142 = M4_data_out[1] # M4_data_out[0] # !M4_data_out[2] # !A1L742;


--A1L042 is reduce_nor~0 at LC8_B18
--operation mode is normal

A1L042 = M4_data_out[2] # !M4_data_out[1] # !M4_data_out[0] # !A1L742;


--A1L242 is reduce_nor~2 at LC1_B18
--operation mode is normal

A1L242 = M4_data_out[1] # !M4_data_out[0] # !M4_data_out[2] # !A1L742;


--P1_q[2] is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|q[2] at LC3_E24
--operation mode is clrb_cntr

P1_q[2]_lut_out = (P1_q[2] $ (B1L431 & P1L5)) & P1L71;
P1_q[2] = DFFEA(P1_q[2]_lut_out, GLOBAL(p12mhz), rst, , B1L431, , );

--P1L7 is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_E24
--operation mode is clrb_cntr

P1L7 = CARRY(P1_q[2] & P1L5);


--M1_data_out[2] is do_adc:u_ad|wri_reg8:u_sel_read_ch|data_out[2] at LC3_F26
--operation mode is normal

M1_data_out[2]_lut_out = A1L65;
M1_data_out[2] = DFFEA(M1_data_out[2]_lut_out, GLOBAL(iow), rst, , B1L851, , );


--B1_t_can_con_adc is do_adc:u_ad|t_can_con_adc at LC6_E30
--operation mode is normal

B1_t_can_con_adc_lut_out = VCC;
B1_t_can_con_adc = DFFEA(B1_t_can_con_adc_lut_out, GLOBAL(iow), !B1L861, , B1L961, , );


--B1L58 is do_adc:u_ad|cda[2]~12 at LC4_E30
--operation mode is normal

B1L58 = B1_t_can_con_adc & P1_q[2] # !B1_t_can_con_adc & M1_data_out[2];


--P1_q[1] is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|q[1] at LC2_E24
--operation mode is clrb_cntr

P1_q[1]_lut_out = (P1_q[1] $ (B1L431 & P1L3)) & P1L71;
P1_q[1] = DFFEA(P1_q[1]_lut_out, GLOBAL(p12mhz), rst, , B1L431, , );

--P1L5 is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT at LC2_E24
--operation mode is clrb_cntr

P1L5 = CARRY(P1_q[1] & P1L3);


--M1_data_out[1] is do_adc:u_ad|wri_reg8:u_sel_read_ch|data_out[1] at LC2_F26
--operation mode is normal

M1_data_out[1]_lut_out = A1L23;
M1_data_out[1] = DFFEA(M1_data_out[1]_lut_out, GLOBAL(iow), rst, , B1L851, , );


--B1L48 is do_adc:u_ad|cda[1]~13 at LC3_E30
--operation mode is normal

B1L48 = B1_t_can_con_adc & P1_q[1] # !B1_t_can_con_adc & M1_data_out[1];


--P1_q[0] is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|q[0] at LC1_E24
--operation mode is clrb_cntr

P1_q[0]_lut_out = (B1L431 $ P1_q[0]) & P1L71;
P1_q[0] = DFFEA(P1_q[0]_lut_out, GLOBAL(p12mhz), rst, , B1L431, , );

--P1L3 is do_adc:u_ad|lpm_counter:t_cda_rtl_1|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT at LC1_E24
--operation mode is clrb_cntr

P1L3 = CARRY(P1_q[0]);


--M1_data_out[0] is do_adc:u_ad|wri_reg8:u_sel_read_ch|data_out[0] at LC8_F31
--operation mode is normal

M1_data_out[0]_lut_out = A1L5;
M1_data_out[0] = DFFEA(M1_data_out[0]_lut_out, GLOBAL(iow), rst, , B1L851, , );


--B1L38 is do_adc:u_ad|cda[0]~14 at LC2_E30
--operation mode is normal

B1L38 = B1_t_can_con_adc & P1_q[0] # !B1_t_can_con_adc & M1_data_out[0];


--N1_rd_adl is do_adc:u_ad|sig_adc:u_sig_adc|rd_adl at LC6_E28
--operation mode is normal

N1_rd_adl_lut_out = !N1L811 & N1_rd_adl # N1L42 & N1L911;
N1_rd_adl = DFFEA(N1_rd_adl_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_rd_adh is do_adc:u_ad|sig_adc:u_sig_adc|rd_adh at LC1_D23
--operation mode is normal

N1_rd_adh_lut_out = N1_st[3] & N1_rd_adh # !N1_st[3] & !N1L19;
N1_rd_adh = DFFEA(N1_rd_adh_lut_out, GLOBAL(p12mhz), rst, , , , );


--N1_start_ad is do_adc:u_ad|sig_adc:u_sig_adc|start_ad at LC7_F28
--operation mode is normal

N1_start_ad_lut_out = N1L441;
N1_start_ad = DFFEA(N1_start_ad_lut_out, GLOBAL(p12mhz), , , rst, , );


--C1_cnt_urgency_put[5] is generate_int:u_int|cnt_urgency_put[5] at LC4_B7
--operation mode is normal

C1_cnt_urgency_put[5]_lut_out = C1L91 & R3_unreg_res_node[5] # !C1L91 & C1L82;
C1_cnt_urgency_put[5] = DFFEA(C1_cnt_urgency_put[5]_lut_out, D1_p1khz, !C1L81, , , , );


--C1_cnt_urgency_put[4] is generate_int:u_int|cnt_urgency_put[4] at LC7_B7
--operation mode is normal

C1_cnt_urgency_put[4]_lut_out = C1L91 & T9_cs_buffer[4] # !C1L91 & C1L82;
C1_cnt_urgency_put[4] = DFFEA(C1_cnt_urgency_put[4]_lut_out, D1_p1khz, !C1L81, , , , );


--C1_cnt_urgency_put[3] is generate_int:u_int|cnt_urgency_put[3] at LC1_B8
--operation mode is normal

C1_cnt_urgency_put[3]_lut_out = T9_cs_buffer[3];
C1_cnt_urgency_put[3] = DFFEA(C1_cnt_urgency_put[3]_lut_out, D1_p1khz, !C1L81, , C1L91, , );


--C1_cnt_urgency_put[2] is generate_int:u_int|cnt_urgency_put[2] at LC8_B8
--operation mode is normal

C1_cnt_urgency_put[2]_lut_out = T9_cs_buffer[2];
C1_cnt_urgency_put[2] = DFFEA(C1_cnt_urgency_put[2]_lut_out, D1_p1khz, !C1L81, , C1L91, , );


--C1L63 is generate_int:u_int|urgency_put_opt_inx~45 at LC6_B7
--operation mode is normal

C1L63 = C1_cnt_urgency_put[5] & C1_cnt_urgency_put[4] & !C1_cnt_urgency_put[3] & !C1_cnt_urgency_put[2];


--C1_urgency_put_tag is generate_int:u_int|urgency_put_tag at LC1_B10
--operation mode is normal

C1_urgency_put_tag_lut_out = VCC;
C1_urgency_put_tag = DFFEA(C1_urgency_put_tag_lut_out, !urgency_put_opt_in, !C1L53, , , , );


--C1_cnt_urgency_put[0] is generate_int:u_int|cnt_urgency_put[0] at LC2_B8
--operation mode is arithmetic

C1_cnt_urgency_put[0]_lut_out = !C1_cnt_urgency_put[0];
C1_cnt_urgency_put[0] = DFFEA(C1_cnt_urgency_put[0]_lut_out, D1_p1khz, !C1L81, , C1L91, , );

--T9_cout[0] is generate_int:u_int|lpm_add_sub:add_rtl_10|addcore:adder|a_csnbuffer:result_node|cout[0] at LC2_B8
--operation mode is arithmetic

T9_cout[0] = CARRY(C1_cnt_urgency_put[0]);


--C1_cnt_urgency_put[1] is generate_int:u_int|cnt_urgency_put[1] at LC3_B7
--operation mode is normal

C1_cnt_urgency_put[1]_lut_out = C1L91 & T9_cs_buffer[1] # !C1L91 & C1_cnt_urgency_put[1] & C1L82;
C1_cnt_urgency_put[1] = DFFEA(C1_cnt_urgency_put[1]_lut_out, D1_p1khz, !C1L81, , , , );


--C1L73 is generate_int:u_int|urgency_put_opt_inx~46 at LC4_B10
--operation mode is normal

C1L73 = C1_urgency_put_tag & C1_cnt_urgency_put[0] & !C1_cnt_urgency_put[1] & !urgency_put_opt_in;


--C1L83 is generate_int:u_int|urgency_put_opt_inx~47 at LC1_F5
--operation mode is normal

C1L83 = C1L33 & C1L63 & C1L73;


--C1_cnt_ready_reset[5] is generate_int:u_int|cnt_ready_reset[5] at LC5_F24
--operation mode is normal

C1_cnt_ready_reset[5]_lut_out = C1L02 & R4_unreg_res_node[5] # !C1L02 & C1L92;
C1_cnt_ready_reset[5] = DFFEA(C1_cnt_ready_reset[5]_lut_out, !D1_p1khz, !C1L9, , , , );


--C1_cnt_ready_reset[4] is generate_int:u_int|cnt_ready_reset[4] at LC8_F24
--operation mode is normal

C1_cnt_ready_reset[4]_lut_out = C1L02 & T21_cs_buffer[4] # !C1L02 & C1L92;
C1_cnt_ready_reset[4] = DFFEA(C1_cnt_ready_reset[4]_lut_out, !D1_p1khz, !C1L9, , , , );


--C1_cnt_ready_reset[3] is generate_int:u_int|cnt_ready_reset[3] at LC1_F35
--operation mode is normal

C1_cnt_ready_reset[3]_lut_out = T21_cs_buffer[3];
C1_cnt_ready_reset[3] = DFFEA(C1_cnt_ready_reset[3]_lut_out, !D1_p1khz, !C1L9, , C1L02, , );


--C1_cnt_ready_reset[2] is generate_int:u_int|cnt_ready_reset[2] at LC2_F35
--operation mode is normal

C1_cnt_ready_reset[2]_lut_out = T21_cs_buffer[2];
C1_cnt_ready_reset[2] = DFFEA(C1_cnt_ready_reset[2]_lut_out, !D1_p1khz, !C1L9, , C1L02, , );


--C1L12 is generate_int:u_int|ready_reset_opt_inx~45 at LC6_F24
--operation mode is normal

C1L12 = C1_cnt_ready_reset[5] & C1_cnt_ready_reset[4] & !C1_cnt_ready_reset[3] & !C1_cnt_ready_reset[2];


--C1_ready_reset_tag is generate_int:u_int|ready_reset_tag at LC2_F23
--operation mode is normal

C1_ready_reset_tag_lut_out = VCC;
C1_ready_reset_tag = DFFEA(C1_ready_reset_tag_lut_out, !ready_reset_opt_in, !C1L43, , , , );


--C1_cnt_ready_reset[0] is generate_int:u_int|cnt_ready_reset[0] at LC3_F35
--operation mode is arithmetic

C1_cnt_ready_reset[0]_lut_out = !C1_cnt_ready_reset[0];
C1_cnt_ready_reset[0] = DFFEA(C1_cnt_ready_reset[0]_lut_out, !D1_p1khz, !C1L9, , C1L02, , );

--T21_cout[0] is generate_int:u_int|lpm_add_sub:add_rtl_11|addcore:adder|a_csnbuffer:result_node|cout[0] at LC3_F35
--operation mode is arithmetic

T21_cout[0] = CARRY(C1_cnt_ready_reset[0]);


--C1_cnt_ready_reset[1] is generate_int:u_int|cnt_ready_reset[1] at LC4_F24
--operation mode is normal

C1_cnt_ready_reset[1]_lut_out = C1L02 & T21_cs_buffer[1] # !C1L02 & C1_cnt_ready_reset[1] & C1L92;
C1_cnt_ready_reset[1] = DFFEA(C1_cnt_ready_reset[1]_lut_out, !D1_p1khz, !C1L9, , , , );


--C1L22 is generate_int:u_int|ready_reset_opt_inx~46 at LC1_F23
--operation mode is normal

C1L22 = C1_ready_reset_tag & C1_cnt_ready_reset[0] & ready_reset_opt_in & !C1_cnt_ready_reset[1];


--C1L32 is generate_int:u_int|ready_reset_opt_inx~47 at LC2_F5
--operation mode is normal

C1L32 = C1L33 & C1L12 & C1L22;


--M3_data_out[0] is write_reg:u_read_write|wri_reg8:u_a3_reg|data_out[0] at LC6_C1
--operation mode is normal

M3_data_out[0]_lut_out = A1L5;
M3_data_out[0] = DFFEA(M3_data_out[0]_lut_out, GLOBAL(iow), rst, , E1L6, , );


--M5_data_out[0] is write_reg:u_read_write|wri_reg8:u_reg_led|data_out[0] at LC8_C30
--operation mode is normal

M5_data_out[0]_lut_out = A1L5;
M5_data_out[0] = DFFEA(M5_data_out[0]_lut_out, GLOBAL(iow), rst, , E1L4, , );


--M5_data_out[1] is write_reg:u_read_write|wri_reg8:u_reg_led|data_out[1] at LC6_C31
--operation mode is normal

M5_data_out[1]_lut_out = A1L23;
M5_data_out[1] = DFFEA(M5_data_out[1]_lut_out, GLOBAL(iow), rst, , E1L4, , );


--M5_data_out[2] is write_reg:u_read_write|wri_reg8:u_reg_led|data_out[2] at LC4_C31
--operation mode is normal

M5_data_out[2]_lut_out = A1L65;
M5_data_out[2] = DFFEA(M5_data_out[2]_lut_out, GLOBAL(iow), rst, , E1L4, , );


--M5_data_out[3] is write_reg:u_read_write|wri_reg8:u_reg_led|data_out[3] at LC8_C34
--operation mode is normal

M5_data_out[3]_lut_out = A1L97;
M5_data_out[3] = DFFEA(M5_data_out[3]_lut_out, GLOBAL(iow), rst, , E1L4, , );


--M5_data_out[4] is write_reg:u_read_write|wri_reg8:u_reg_led|data_out[4] at LC2_C34
--operation mode is normal

M5_data_out[4]_lut_out = A1L201;
M5_data_out[4] = DFFEA(M5_data_out[4]_lut_out, GLOBAL(iow), rst, , E1L4, , );


--M6_data_out[0] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[0] at LC4_D1
--operation mode is normal

M6_data_out[0]_lut_out = A1L5;
M6_data_out[0] = DFFEA(M6_data_out[0]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--M6_data_out[1] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[1] at LC8_D8
--operation mode is normal

M6_data_out[1]_lut_out = A1L23;
M6_data_out[1] = DFFEA(M6_data_out[1]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--M6_data_out[2] is write_reg:u_read_write|wri_reg8:u_y7b_reg|data_out[2] at LC6_D9
--operation mode is normal

M6_data_out[2]_lut_out = A1L65;
M6_data_out[2] = DFFEA(M6_data_out[2]_lut_out, GLOBAL(iow), rst, , E1L5, , );


--P01_q[4] is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|q[4] at LC5_F2
--operation mode is clrb_cntr

P01_q[4]_lut_out = (P01_q[4] $ (P01L11 & P01L9)) & VCC;
P01_q[4] = DFFEA(P01_q[4]_lut_out, !U4_data_clk, !U4L31, , , , );


--P01_q[3] is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|q[3] at LC4_F2
--operation mode is clrb_cntr

P01_q[3]_lut_out = (P01_q[3] $ (P01L11 & P01L7)) & VCC;
P01_q[3] = DFFEA(P01_q[3]_lut_out, !U4_data_clk, !U4L31, , , , );

--P01L9 is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT at LC4_F2
--operation mode is clrb_cntr

P01L9 = CARRY(P01_q[3] & P01L7);


--P01_q[2] is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|q[2] at LC3_F2
--operation mode is clrb_cntr

P01_q[2]_lut_out = (P01_q[2] $ (P01L11 & P01L5)) & VCC;
P01_q[2] = DFFEA(P01_q[2]_lut_out, !U4_data_clk, !U4L31, , , , );

--P01L7 is tx8:u_tx8|lpm_counter:data_cnt_rtl_2|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT at LC3_F2