📄 ce120_readme.txt
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Readme File for Code Example:
CE120 - ADC Channel Scanning
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This file contains the following sections:
1. Code Example Description
2. Folder Contents
3. Suggested Development Resources
4. Reconfiguring the project for a different dsPIC33F device
5. Revision History
1. Code Example Description:
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In this example, Timer 3 is setup to time-out every 125 microseconds (8Khz Rate).
As a result, the module will stop sampling and trigger a A/D conversion on every Timer3 time-out, i.e., Ts=125us.
ADC is configured in 10bit mode to sequencially scan AIN4, AIN5, AIN10, AIN13 inputs on Timer 3 interrupt.
It will take FOUR Timer3 Timeout period to scan through all the FOUR Analog inputs.
ADC module clock time period is configured as Tad=Tcy*(ADCS+1)= (1/40M)*64 = 1.6us (625Khz).
Hence the conversion time for 10-bit A/D Conversion Time Tc=12*Tad = 19.2us
DMA is used to sort and transfer the converted data to DMA RAM. DMA is configured in ping-pong mode
and it transfers 8samples of each of the FOUR analog inputs and generates interrupt.
DMA channel 0 is confiured in ping-pong mode to move the converted data from ADC to DMA RAM on every sample/convert sequence.
First, DMA uses DMA0STA base address to store the ADC samples and it generates interrupt
after transfering (4 x 8 samples = 32 samples).
Next, DMA uses DMA0STB base address to store the ADC samples and it generates interrupt
after transferubg (4 x 8 samples = 31 samples).
Above process repeats contineously.
void __attribute__((__interrupt__)) _DMA0Interrupt(void);
DMA interrupt service routine, moves the data from DMA buffer to ADC signal buffer
ISR rate will be (8k/32samples) = 250Hz for 8K ADC trigger rate from Timer.
RA6 pin is toggled in ISR, hence it will be toggling at ~ 125Hz
2. Folder Contents:
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This folder contains the following sub-folders:
a. C:\Program Files\Microchip\MPLAB C30\support\gld
This folder will have the device GLD file, it is used for building the project.
This file was provided with the MPLAB
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