pwm.cbx.xml

FPGA下PWM的Verilog 源码

<?xml version="1.0" ?>
<LOG_ROOT>
	<PROJECT NAME="pwm">
		<CBX_INST_ENTRY INSTANCE_NAME="|pwm|lpm_add_sub:Add0" CBX_FILE_NAME="add_sub_eoh.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|pwm|lpm_add_sub:Add2" CBX_FILE_NAME="add_sub_kbg.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|pwm|lpm_add_sub:Add4" CBX_FILE_NAME="add_sub_3nh.tdf"/>
	</PROJECT>
</LOG_ROOT>