segment7.fit.qmsg

7段数码管译码器,用VHDL在FPGA2000上显示

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus II " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Web Edition " "Info: Version 5.0 Build 148 04/26/2005 SJ Web Edition" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 28 15:53:51 2007 " "Info: Processing started: Wed Nov 28 15:53:51 2007" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off segment7 -c segment7 " "Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off segment7 -c segment7" {  } {  } 0}
{ "Info" "IMPP_MPP_USER_DEVICE" "segment7 EP2C35F672C6 " "Info: Selected device EP2C35F672C6 for design \"segment7\"" {  } {  } 0}
{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" {  } {  } 0}
{ "Info" "ITAN_TDC_DEFAULT_OPTIMIZATION_GOALS" "" "Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements" { { "Info" "ITAN_TDC_ASSUMED_DEFAULT_REQUIREMENT" "fmax 1 MHz " "Info: Assuming a global fmax requirement of 1 MHz" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tsu " "Info: Not setting a global tsu requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tco " "Info: Not setting a global tco requirement" {  } {  } 0} { "Info" "ITAN_TDC_NO_DEFAULT_REQUIREMENT" "tpd " "Info: Not setting a global tpd requirement" {  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED" "" "Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices. " { { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C50F672C6 " "Info: Device EP2C50F672C6 is compatible" {  } {  } 2} { "Info" "IFSAC_FSAC_MIGRATION_NOT_SELECTED_SUB" "EP2C70F672C6 " "Info: Device EP2C70F672C6 is compatible" {  } {  } 2}  } {  } 2}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "clk (placed in PIN N2 (CLK0, LVDSCLK0p, Input)) " "Info: Automatically promoted node clk (placed in PIN N2 (CLK0, LVDSCLK0p, Input))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G2 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G2" {  } {  } 0}  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 8 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "clk" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { clk } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { clk } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "count\[24\]  " "Info: Automatically promoted node count\[24\] " { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock " "Info: Automatically promoted destinations to use location or clock signal Global Clock" {  } {  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "count\[24\]~248 " "Info: Destination node count\[24\]~248" {  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 18 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count\[24\]~248" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { count[24]~248 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { count[24]~248 } "NODE_NAME" } }  } 0}  } {  } 0}  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 18 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "count\[24\]" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { count[24] } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { count[24] } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL" "key3 (placed in PIN W26 (LVDS139p, CDPCLK4/DQS3R/CQ3R#)) " "Info: Automatically promoted node key3 (placed in PIN W26 (LVDS139p, CDPCLK4/DQS3R/CQ3R#))" { { "Info" "IFSAC_FSAC_ASSIGN_AUTO_GLOBAL_TO_SIGNAL_FANOUTS" "destinations Global Clock CLKCTRL_G7 " "Info: Automatically promoted destinations to use location or clock signal Global Clock CLKCTRL_G7" {  } {  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS" "" "Info: The following destination nodes may be non-global or may not use global or regional clocks" { { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "TEMP\[0\]~275 " "Info: Destination node TEMP\[0\]~275" {  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 34 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "TEMP\[0\]~275" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { TEMP[0]~275 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { TEMP[0]~275 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "TEMP\[1\]~277 " "Info: Destination node TEMP\[1\]~277" {  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 34 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "TEMP\[1\]~277" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { TEMP[1]~277 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { TEMP[1]~277 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "TEMP\[2\]~279 " "Info: Destination node TEMP\[2\]~279" {  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 34 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "TEMP\[2\]~279" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { TEMP[2]~279 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { TEMP[2]~279 } "NODE_NAME" } }  } 0} { "Info" "IFSAC_FSAC_GLOBAL_UNASSIGNED_FANOUTS_SUB" "TEMP\[3\]~281 " "Info: Destination node TEMP\[3\]~281" {  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 34 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "TEMP\[3\]~281" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { TEMP[3]~281 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { TEMP[3]~281 } "NODE_NAME" } }  } 0}  } {  } 0}  } { { "segment7.vhd" "" { Text "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.vhd" 11 -1 0 } } { "c:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "key3" } } } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" "" { Report "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7_cmp.qrpt" Compiler "segment7" "UNKNOWN" "V1" "C:/Documents and Settings/student/桌面/evelyn/ex (4)/db/segment7.quartus_db" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/" "" "" { key3 } "NODE_NAME" } "" } } { "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" { Floorplan "C:/Documents and Settings/student/桌面/evelyn/ex (4)/segment7.fld" "" "" { key3 } "NODE_NAME" } }  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Info: Starting register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_START_REG_LOCATION_PROCESSING" "" "Info: Performing register packing on registers with non-logic cell location assignments" {  } {  } 0}