fifo.map.rpt

先进先出存储电路fifo

; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 36    ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 9     ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+---------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo|altsyncram_joa1:FIFOram ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
; Assignment                      ; Value              ; From ; To                                                                      ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------+
; OPTIMIZE_POWER_DURING_SYNTHESIS ; NORMAL_COMPILATION ; -    ; -                                                                       ;
+---------------------------------+--------------------+------+-------------------------------------------------------------------------+


+-------------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lpm_fifo0:inst|scfifo:scfifo_component ;
+-------------------------+-------------+---------------------------------------------+
; Parameter Name          ; Value       ; Type                                        ;
+-------------------------+-------------+---------------------------------------------+
; AUTO_CARRY_CHAINS       ; ON          ; AUTO_CARRY                                  ;
; IGNORE_CARRY_BUFFERS    ; OFF         ; IGNORE_CARRY                                ;
; AUTO_CASCADE_CHAINS     ; ON          ; AUTO_CASCADE                                ;
; IGNORE_CASCADE_BUFFERS  ; OFF         ; IGNORE_CASCADE                              ;
; lpm_width               ; 8           ; Signed Integer                              ;
; LPM_NUMWORDS            ; 256         ; Signed Integer                              ;
; LPM_WIDTHU              ; 8           ; Signed Integer                              ;
; LPM_SHOWAHEAD           ; OFF         ; Untyped                                     ;
; UNDERFLOW_CHECKING      ; ON          ; Untyped                                     ;
; OVERFLOW_CHECKING       ; ON          ; Untyped                                     ;
; ALLOW_RWCYCLE_WHEN_FULL ; OFF         ; Untyped                                     ;
; ADD_RAM_OUTPUT_REGISTER ; ON          ; Untyped                                     ;
; ALMOST_FULL_VALUE       ; 0           ; Untyped                                     ;
; ALMOST_EMPTY_VALUE      ; 0           ; Untyped                                     ;
; USE_EAB                 ; ON          ; Untyped                                     ;
; MAXIMIZE_SPEED          ; 5           ; Untyped                                     ;
; DEVICE_FAMILY           ; Cyclone     ; Untyped                                     ;
; OPTIMIZE_FOR_SPEED      ; 5           ; Untyped                                     ;
; CBXI_PARAMETER          ; scfifo_7821 ; Untyped                                     ;
+-------------------------+-------------+---------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+---------------------------------------------------------------------+
; scfifo Parameter Settings by Entity Instance                        ;
+----------------------------+----------------------------------------+
; Name                       ; Value                                  ;
+----------------------------+----------------------------------------+
; Number of entity instances ; 1                                      ;
; Entity Instance            ; lpm_fifo0:inst|scfifo:scfifo_component ;
;     -- FIFO Type           ; Single Clock                           ;
;     -- lpm_width           ; 8                                      ;
;     -- LPM_NUMWORDS        ; 256                                    ;
;     -- LPM_SHOWAHEAD       ; OFF                                    ;
;     -- USE_EAB             ; ON                                     ;
+----------------------------+----------------------------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 7.2 Build 151 09/26/2007 SJ Full Version
    Info: Processing started: Mon Apr 13 19:32:44 2009
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off fifo -c fifo
Info: Found 1 design units, including 1 entities, in source file fifo.bdf
    Info: Found entity 1: fifo
Info: Elaborating entity "fifo" for the top level hierarchy
Warning: Using design file lpm_fifo0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
    Info: Found entity 1: lpm_fifo0
Info: Elaborating entity "lpm_fifo0" for hierarchy "lpm_fifo0:inst"
Info: Found 1 design units, including 1 entities, in source file ../../../altera/72/quartus/libraries/megafunctions/scfifo.tdf
    Info: Found entity 1: scfifo
Info: Elaborating entity "scfifo" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component"
Info: Elaborated megafunction instantiation "lpm_fifo0:inst|scfifo:scfifo_component"
Info: Found 1 design units, including 1 entities, in source file db/scfifo_7821.tdf
    Info: Found entity 1: scfifo_7821
Info: Elaborating entity "scfifo_7821" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/a_dpfifo_ee21.tdf
    Info: Found entity 1: a_dpfifo_ee21
Info: Elaborating entity "a_dpfifo_ee21" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_joa1.tdf
    Info: Found entity 1: altsyncram_joa1
Info: Elaborating entity "altsyncram_joa1" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo|altsyncram_joa1:FIFOram"
Info: Found 1 design units, including 1 entities, in source file db/cntr_ubb.tdf
    Info: Found entity 1: cntr_ubb
Info: Elaborating entity "cntr_ubb" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo|cntr_ubb:rd_ptr_msb"
Info: Found 1 design units, including 1 entities, in source file db/cntr_bc7.tdf
    Info: Found entity 1: cntr_bc7
Info: Elaborating entity "cntr_bc7" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo|cntr_bc7:usedw_counter"
Info: Found 1 design units, including 1 entities, in source file db/cntr_vbb.tdf
    Info: Found entity 1: cntr_vbb
Info: Elaborating entity "cntr_vbb" for hierarchy "lpm_fifo0:inst|scfifo:scfifo_component|scfifo_7821:auto_generated|a_dpfifo_ee21:dpfifo|cntr_vbb:wr_ptr"
Info: Implemented 92 device resources after synthesis - the final resource count might be different
    Info: Implemented 11 input pins
    Info: Implemented 16 output pins
    Info: Implemented 57 logic cells
    Info: Implemented 8 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Allocated 147 megabytes of memory during processing
    Info: Processing ended: Mon Apr 13 19:32:48 2009
    Info: Elapsed time: 00:00:04