framer.vhd

扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现

LIBRARY ieee;
USE ieee.std_logic_1164.all;

ENTITY framer is
PORT(
	clk: in std_logic;
	clkx4:in std_logic;
	control:in std_logic;
	datai_1:in std_logic;
	dataq_1:in std_logic;
	notready:in std_logic;
	datai_b:out std_logic;
	dataq_b:out std_logic
	);
end framer;

architecture framer_archi of framer is
	signal nextcount:std_logic_vector(3 downto 0);
	signal buffi,buffq:std_logic_vector(2 downto 0);
begin
process(notready,control,clkx4,nextcount)
begin
	if control='0' then
		datai_b<='0';
		dataq_b<='0';
	elsif clkx4'event and clkx4='1' then
		case nextcount is
			when "0000"=>datai_b<='1';dataq_b<='1';
			when "0001"=>datai_b<='0';dataq_b<='0';
			when "0011"=>datai_b<='1';dataq_b<='1';
			when "0010"=>datai_b<='0';dataq_b<='0';
			when "0110"=>datai_b<='0';dataq_b<='1';
			when "0111"=>datai_b<='1';dataq_b<='0';
			when "0101"=>datai_b<='1';dataq_b<='0';
			when "0100"=>datai_b<='0';dataq_b<='0';
			when "1100"=>datai_b<='1';dataq_b<='1';
			when "1101"=>datai_b<='1';dataq_b<='1';
			when "1111"=>datai_b<='0';dataq_b<='0';
			when "1110"=>datai_b<=buffi(0);dataq_b<=buffq(0);
			when "1010"=>datai_b<=buffi(0);dataq_b<=buffq(0);
			when "1011"=>datai_b<=buffi(1);dataq_b<=buffq(1);
			when "1001"=>datai_b<=buffi(2);dataq_b<=buffq(2);
			when "1000"=>datai_b<='1';dataq_b<='1';
			when others=>datai_b<='X';dataq_b<='X';
		end case;
	end if;
end process;

process(notready,clkx4)
begin
	if notready='1' then
		nextcount<="0000";
	elsif clkx4'event and clkx4='1' then
		case nextcount is
			when"0000"=>nextcount<="0001";
			when"0001"=>nextcount<="0011";
			when"0011"=>nextcount<="0010";
			when"0010"=>nextcount<="0110";
			when"0110"=>nextcount<="0111";
			when"0111"=>nextcount<="0101";
			when"0101"=>nextcount<="0100";
			when"0100"=>nextcount<="1100";
			when"1100"=>nextcount<="1101";
			when"1101"=>nextcount<="1111";
			when"1111"=>nextcount<="1110";
			when"1110"=>nextcount<="1010";
			when"1010"=>nextcount<="1011";
			when"1011"=>nextcount<="1001";
			when"1001"=>nextcount<="1000";
			when"1000"=>nextcount<="0000";
			when others=>nextcount<="XXXX";

		end case;
	end if;
end process;

process(clk,notready)
begin
	if notready='1' then
		buffq<="000";
	elsif clk'event and clk='1' then
		buffq(0)<=buffq(1);
		buffq(1)<=buffq(2);
		buffq(2)<=dataq_1;
	end if;
end process;
end framer_archi;