ds_fh.hier_info

扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现

ROM_DATA[14] => Mux1.IN119
ROM_DATA[15] => Mux0.IN119
ROM_DATA[16] => Mux3.IN115
ROM_DATA[17] => Mux2.IN115
ROM_DATA[18] => Mux1.IN115
ROM_DATA[19] => Mux0.IN115
ROM_DATA[20] => Mux3.IN111
ROM_DATA[21] => Mux2.IN111
ROM_DATA[22] => Mux1.IN111
ROM_DATA[23] => Mux0.IN111
ROM_DATA[24] => Mux3.IN107
ROM_DATA[25] => Mux2.IN107
ROM_DATA[26] => Mux1.IN107
ROM_DATA[27] => Mux0.IN107
ROM_DATA[28] => Mux3.IN103
ROM_DATA[29] => Mux2.IN103
ROM_DATA[30] => Mux1.IN103
ROM_DATA[31] => Mux0.IN103
ROM_DATA[32] => Mux3.IN99
ROM_DATA[33] => Mux2.IN99
ROM_DATA[34] => Mux1.IN99
ROM_DATA[35] => Mux0.IN99
ROM_DATA[36] => Mux3.IN95
ROM_DATA[37] => Mux2.IN95
ROM_DATA[38] => Mux1.IN95
ROM_DATA[39] => Mux0.IN95
ROM_DATA[40] => Mux3.IN91
ROM_DATA[41] => Mux2.IN91
ROM_DATA[42] => Mux1.IN91
ROM_DATA[43] => Mux0.IN91
ROM_DATA[44] => Mux3.IN87
ROM_DATA[45] => Mux2.IN87
ROM_DATA[46] => Mux1.IN87
ROM_DATA[47] => Mux0.IN87
ROM_DATA[48] => Mux3.IN83
ROM_DATA[49] => Mux2.IN83
ROM_DATA[50] => Mux1.IN83
ROM_DATA[51] => Mux0.IN83
ROM_DATA[52] => Mux3.IN79
ROM_DATA[53] => Mux2.IN79
ROM_DATA[54] => Mux1.IN79
ROM_DATA[55] => Mux0.IN79
ROM_DATA[56] => Mux3.IN75
ROM_DATA[57] => Mux2.IN75
ROM_DATA[58] => Mux1.IN75
ROM_DATA[59] => Mux0.IN75
ROM_DATA[60] => Mux3.IN71
ROM_DATA[61] => Mux2.IN71
ROM_DATA[62] => Mux1.IN71
ROM_DATA[63] => Mux0.IN71
ROM_DATA[64] => Mux3.IN67
ROM_DATA[65] => Mux2.IN67
ROM_DATA[66] => Mux1.IN67
ROM_DATA[67] => Mux0.IN67
ROM_DATA[68] => Mux3.IN63
ROM_DATA[69] => Mux2.IN63
ROM_DATA[70] => Mux1.IN63
ROM_DATA[71] => Mux0.IN63
ROM_DATA[72] => Mux3.IN59
ROM_DATA[73] => Mux2.IN59
ROM_DATA[74] => Mux1.IN59
ROM_DATA[75] => Mux0.IN59
ROM_DATA[76] => Mux3.IN55
ROM_DATA[77] => Mux2.IN55
ROM_DATA[78] => Mux1.IN55
ROM_DATA[79] => Mux0.IN55
TCK => WORD_SR[0].CLK
TCK => WORD_SR[1].CLK
TCK => WORD_SR[2].CLK
TCK => WORD_SR[3].CLK
TCK => word_counter[0].CLK
TCK => word_counter[1].CLK
TCK => word_counter[2].CLK
TCK => word_counter[3].CLK
TCK => word_counter[4].CLK
SHIFT => word_counter~5.OUTPUTSELECT
SHIFT => word_counter~6.OUTPUTSELECT
SHIFT => word_counter~7.OUTPUTSELECT
SHIFT => word_counter~8.OUTPUTSELECT
SHIFT => word_counter~9.OUTPUTSELECT
SHIFT => WORD_SR~0.OUTPUTSELECT
SHIFT => WORD_SR~1.OUTPUTSELECT
SHIFT => WORD_SR~2.OUTPUTSELECT
SHIFT => WORD_SR~3.OUTPUTSELECT
UPDATE => clear_signal.IN0
USR1 => clear_signal.IN1
ENA => word_counter~10.OUTPUTSELECT
ENA => word_counter~11.OUTPUTSELECT
ENA => word_counter~12.OUTPUTSELECT
ENA => word_counter~13.OUTPUTSELECT
ENA => word_counter~14.OUTPUTSELECT
ENA => WORD_SR~4.OUTPUTSELECT
ENA => WORD_SR~5.OUTPUTSELECT
ENA => WORD_SR~6.OUTPUTSELECT
ENA => WORD_SR~7.OUTPUTSELECT
TDI => WORD_SR~0.DATAA
TDO <= WORD_SR[0].DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|QPSK:inst1|cnt2:inst17
clk => adder[0].CLK
clk => adder[1].CLK
clk => adder[2].CLK
clk => adder[3].CLK
clk => adder[4].CLK
clk => adder[5].CLK
clk => adder[6].CLK
clk => adder[7].CLK
datak2[0] => Add0.IN8
datak2[1] => Add0.IN7
datak2[2] => Add0.IN6
datak2[3] => Add0.IN5
datak2[4] => Add0.IN4
datak2[5] => Add0.IN3
datak2[6] => Add0.IN2
datak2[7] => Add0.IN1
adder2[0] <= adder[0].DB_MAX_OUTPUT_PORT_TYPE
adder2[1] <= adder[1].DB_MAX_OUTPUT_PORT_TYPE
adder2[2] <= adder[2].DB_MAX_OUTPUT_PORT_TYPE
adder2[3] <= adder[3].DB_MAX_OUTPUT_PORT_TYPE
adder2[4] <= adder[4].DB_MAX_OUTPUT_PORT_TYPE
adder2[5] <= adder[5].DB_MAX_OUTPUT_PORT_TYPE
adder2[6] <= adder[6].DB_MAX_OUTPUT_PORT_TYPE
adder2[7] <= adder[7].DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14
DS_code <= mux_code:inst16.DS_code
clkx1024 => mpn5:inst.clkx1024
clkx1024 => mpn6:inst1.clkx1024
clkx1024 => mpn7:inst2.clkx1024
clkx1024 => mpn8:inst3.clkx1024
clkx1024 => mpn9:inst4.clkx1024
clkx1024 => M5:inst5.clkx1024
clkx1024 => M6:inst6.clkx1024
clkx1024 => M7:inst7.clkx1024
clkx1024 => M8:inst8.clkx1024
clkx1024 => M9:inst9.clkx1024
clkx1024 => Gold_Code:inst15.clkx1024
clkx1024 => Gold6:inst10.clkx1024
clkx1024 => Gold7:inst11.clkx1024
clkx1024 => Gold8:inst12.clkx1024
clkx1024 => Gold9:inst13.clkx1024
notready => mpn5:inst.notready
notready => mpn6:inst1.notready
notready => mpn7:inst2.notready
notready => mpn8:inst3.notready
notready => mpn9:inst4.notready
notready => M5:inst5.notready
notready => M6:inst6.notready
notready => M7:inst7.notready
notready => M8:inst8.notready
notready => M9:inst9.notready
notready => Gold_Code:inst15.notready
notready => Gold6:inst10.notready
notready => Gold7:inst11.notready
notready => Gold8:inst12.notready
notready => Gold9:inst13.notready
code_len[0] => mux_code:inst16.code_len[0]
code_len[1] => mux_code:inst16.code_len[1]
code_len[2] => mux_code:inst16.code_len[2]
code_style[0] => mux_code:inst16.code_style[0]
code_style[1] => mux_code:inst16.code_style[1]


|DS_FH|DS_code:inst14|mux_code:inst16
m5 => Mux0.IN17
m6 => Mux0.IN18
m7 => Mux0.IN19
m8 => Mux0.IN20
m9 => Mux0.IN21
M_5 => Mux0.IN22
M_6 => Mux0.IN23
M_7 => Mux0.IN24
M_8 => Mux0.IN25
M_9 => Mux0.IN26
gold5 => Mux0.IN27
gold6 => Mux0.IN28
gold7 => Mux0.IN29
gold8 => Mux0.IN30
gold9 => Mux0.IN31
code_style[0] => Mux0.IN36
code_style[0] => Mux1.IN36
code_style[1] => Mux0.IN35
code_style[1] => Mux1.IN35
code_len[0] => Mux0.IN34
code_len[0] => Mux1.IN34
code_len[1] => Mux0.IN33
code_len[1] => Mux1.IN33
code_len[2] => Mux0.IN32
code_len[2] => Mux1.IN32
DS_code <= DS_code$latch.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|mpn5:inst
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~1.CLK
clkx1024 => comb~2.CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => m5~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
m5 <= m5~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|mpn6:inst1
clkx1024 => comb~1.CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~2.CLK
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => count[6].CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => comb~5.CLK
clkx1024 => m6~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
notready => count[6].ACLR
m6 <= m6~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|mpn7:inst2
clkx1024 => comb~1.CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~2.CLK
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => count[6].CLK
clkx1024 => count[7].CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => comb~5.CLK
clkx1024 => comb~6.CLK
clkx1024 => m7~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
notready => count[6].ACLR
notready => count[7].ACLR
m7 <= m7~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|mpn8:inst3
clkx1024 => comb~1.CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~2.CLK
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => count[6].CLK
clkx1024 => count[7].CLK
clkx1024 => count[8].CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => comb~5.CLK
clkx1024 => comb~6.CLK
clkx1024 => comb~7.CLK
clkx1024 => m8~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
notready => count[6].ACLR
notready => count[7].ACLR
notready => count[8].ACLR
m8 <= m8~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|mpn9:inst4
clkx1024 => comb~1.CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~2.CLK
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => count[6].CLK
clkx1024 => count[7].CLK
clkx1024 => count[8].CLK
clkx1024 => count[9].CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => comb~5.CLK
clkx1024 => comb~6.CLK
clkx1024 => comb~7.CLK
clkx1024 => comb~8.CLK
clkx1024 => m9~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
notready => count[6].ACLR
notready => count[7].ACLR
notready => count[8].ACLR
notready => count[9].ACLR
m9 <= m9~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|M5:inst5
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~1.CLK
clkx1024 => comb~2.CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => M_5~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0].ACLR
notready => count[1].ACLR
notready => count[2].ACLR
notready => count[3].ACLR
notready => count[4].ACLR
notready => count[5].ACLR
M_5 <= M_5~reg0.DB_MAX_OUTPUT_PORT_TYPE


|DS_FH|DS_code:inst14|M6:inst6
clkx1024 => count[0].CLK
clkx1024 => count[1].CLK
clkx1024 => count[2].CLK
clkx1024 => count[3].CLK
clkx1024 => count[4].CLK
clkx1024 => count[5].CLK
clkx1024 => count[6].CLK
clkx1024 => comb~0.CLK
clkx1024 => comb~1.CLK
clkx1024 => comb~2.CLK
clkx1024 => comb~3.CLK
clkx1024 => comb~4.CLK
clkx1024 => comb~5.CLK
clkx1024 => M_6~reg0.CLK
clkx1024 => enable.CLK
notready => process0~0.IN1
notready => enable.PRESET
notready => count[0]