ds_fh.map.qmsg

扩跳频通信在QUARTUS7.0开发环境下的VHDL源程序及总体框图实现

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 7.0 Build 33 02/05/2007 SJ Full Version " "Info: Version 7.0 Build 33 02/05/2007 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jan 13 08:50:32 2008 " "Info: Processing started: Sun Jan 13 08:50:32 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off DS_FH -c DS_FH " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DS_FH -c DS_FH" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "DS_FH.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file DS_FH.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 DS_FH " "Info: Found entity 1: DS_FH" {  } { { "DS_FH.bdf" "" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mux_hopset.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file mux_hopset.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 mux_hopset-one " "Info: Found design unit 1: mux_hopset-one" {  } { { "mux_hopset.vhd" "" { Text "E:/Quartus/DS_FH/mux_hopset.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 mux_hopset " "Info: Found entity 1: mux_hopset" {  } { { "mux_hopset.vhd" "" { Text "E:/Quartus/DS_FH/mux_hopset.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mux_framer.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file mux_framer.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 mux_framer-one " "Info: Found design unit 1: mux_framer-one" {  } { { "mux_framer.vhd" "" { Text "E:/Quartus/DS_FH/mux_framer.vhd" 9 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 mux_framer " "Info: Found entity 1: mux_framer" {  } { { "mux_framer.vhd" "" { Text "E:/Quartus/DS_FH/mux_framer.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "clk_div.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file clk_div.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 clk_div-one " "Info: Found design unit 1: clk_div-one" {  } { { "clk_div.vhd" "" { Text "E:/Quartus/DS_FH/clk_div.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 clk_div " "Info: Found entity 1: clk_div" {  } { { "clk_div.vhd" "" { Text "E:/Quartus/DS_FH/clk_div.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "piso8.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file piso8.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 piso8-one " "Info: Found design unit 1: piso8-one" {  } { { "piso8.vhd" "" { Text "E:/Quartus/DS_FH/piso8.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 piso8 " "Info: Found entity 1: piso8" {  } { { "piso8.vhd" "" { Text "E:/Quartus/DS_FH/piso8.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "DS_FH " "Info: Elaborating entity \"DS_FH\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "ddscontrol.vhd 2 1 " "Warning: Using design file ddscontrol.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ddscontrol-one " "Info: Found design unit 1: ddscontrol-one" {  } { { "ddscontrol.vhd" "" { Text "E:/Quartus/DS_FH/ddscontrol.vhd" 15 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ddscontrol " "Info: Found entity 1: ddscontrol" {  } { { "ddscontrol.vhd" "" { Text "E:/Quartus/DS_FH/ddscontrol.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ddscontrol ddscontrol:inst17 " "Info: Elaborating entity \"ddscontrol\" for hierarchy \"ddscontrol:inst17\"" {  } { { "DS_FH.bdf" "inst17" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 16 1008 1152 240 "inst17" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "clk_div clk_div:inst11 " "Info: Elaborating entity \"clk_div\" for hierarchy \"clk_div:inst11\"" {  } { { "DS_FH.bdf" "inst11" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 64 -8 144 192 "inst11" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux_hopset mux_hopset:inst7 " "Info: Elaborating entity \"mux_hopset\" for hierarchy \"mux_hopset:inst7\"" {  } { { "DS_FH.bdf" "inst7" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 64 744 952 160 "inst7" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "initialization.vhd 2 1 " "Warning: Using design file initialization.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 initialization-one " "Info: Found design unit 1: initialization-one" {  } { { "initialization.vhd" "" { Text "E:/Quartus/DS_FH/initialization.vhd" 15 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 initialization " "Info: Found entity 1: initialization" {  } { { "initialization.vhd" "" { Text "E:/Quartus/DS_FH/initialization.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "initialization initialization:inst " "Info: Elaborating entity \"initialization\" for hierarchy \"initialization:inst\"" {  } { { "DS_FH.bdf" "inst" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 64 240 424 192 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "start initialization.vhd(89) " "Warning (10492): VHDL Process Statement warning at initialization.vhd(89): signal \"start\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "initialization.vhd" "" { Text "E:/Quartus/DS_FH/initialization.vhd" 89 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "count initialization.vhd(89) " "Warning (10492): VHDL Process Statement warning at initialization.vhd(89): signal \"count\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "initialization.vhd" "" { Text "E:/Quartus/DS_FH/initialization.vhd" 89 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "shift initialization.vhd(99) " "Warning (10492): VHDL Process Statement warning at initialization.vhd(99): signal \"shift\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" {  } { { "initialization.vhd" "" { Text "E:/Quartus/DS_FH/initialization.vhd" 99 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensitivity list" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "hopset_generator.vhd 2 1 " "Warning: Using design file hopset_generator.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 hopset_generator-generator_archi " "Info: Found design unit 1: hopset_generator-generator_archi" {  } { { "hopset_generator.vhd" "" { Text "E:/Quartus/DS_FH/hopset_generator.vhd" 14 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 hopset_generator " "Info: Found entity 1: hopset_generator" {  } { { "hopset_generator.vhd" "" { Text "E:/Quartus/DS_FH/hopset_generator.vhd" 6 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "hopset_generator hopset_generator:inst2 " "Info: Elaborating entity \"hopset_generator\" for hierarchy \"hopset_generator:inst2\"" {  } { { "DS_FH.bdf" "inst2" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 96 512 704 192 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "QPSK.bdf 1 1 " "Warning: Using design file QPSK.bdf, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 QPSK " "Info: Found entity 1: QPSK" {  } { { "QPSK.bdf" "" { Schematic "E:/Quartus/DS_FH/QPSK.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "QPSK QPSK:inst1 " "Info: Elaborating entity \"QPSK\" for hierarchy \"QPSK:inst1\"" {  } { { "DS_FH.bdf" "inst1" { Schematic "E:/Quartus/DS_FH/DS_FH.bdf" { { 248 1128 1328 376 "inst1" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WSGN_SEARCH_FILE" "add.vhd 2 1 " "Warning: Using design file add.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 add-one " "Info: Found design unit 1: add-one" {  } { { "add.vhd" "" { Text "E:/Quartus/DS_FH/add.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 add " "Info: Found entity 1: add" {  } { { "add.vhd" "" { Text "E:/Quartus/DS_FH/add.vhd" 5 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Using design file %1!s!, which is not specified as a design file for the current project, but contains definitions for %2!d! design units and %3!d! entities in project" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add QPSK:inst1\|add:inst13 " "Info: Elaborating entity \"add\" for hierarchy \"QPSK:inst1\|add:inst13\"" {  } { { "QPSK.bdf" "inst13" { Schematic "E:/Quartus/DS_FH/QPSK.bdf" { { 8 736 904 104 "inst13" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}