de2_synthesizer.map.qmsg

build synthesizer on a de2 dev fpga board

{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(46) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(46): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 46 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(47) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(47): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 47 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(48) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(48): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 48 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(49) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(49): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 49 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(50) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(50): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 50 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(51) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(51): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 51 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(52) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(52): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 52 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(53) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(53): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 53 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(54) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(54): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 54 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(55) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(55): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 55 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(56) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(56): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 56 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(57) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(57): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 57 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(58) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(58): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 58 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(59) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(59): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 59 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(60) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(60): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 60 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(61) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(61): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 61 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(62) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(62): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 62 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(63) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(63): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 63 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(64) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(64): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 64 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(65) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(65): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 65 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(66) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(66): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 66 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(67) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(67): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 67 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(68) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(68): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 68 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(69) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(69): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 69 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(70) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(70): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 70 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(71) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(71): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 71 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_brass.v(72) " "Warning (10229): Verilog HDL Expression warning at wave_gen_brass.v(72): truncated literal to match 16 bits" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 72 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "wave_gen_brass.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file wave_gen_brass.v" { { "Info" "ISGN_ENTITY_NAME" "1 wave_gen_brass " "Info: Found entity 1: wave_gen_brass" {  } { { "wave_gen_brass.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_brass.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_ramp.v(10) " "Warning (10229): Verilog HDL Expression warning at wave_gen_ramp.v(10): truncated literal to match 16 bits" {  } { { "wave_gen_ramp.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_ramp.v" 10 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}
{ "Warning" "WVRFX_VERI_LITERAL_TRUNCATED_TO_FIT" "16 wave_gen_ramp.v(11) " "Warning (10229): Verilog HDL Expression warning at wave_gen_ramp.v(11): truncated literal to match 16 bits" {  } { { "wave_gen_ramp.v" "" { Text "C:/Documents and Settings/eyal/Desktop/DE2_synthesizer/DE2_synthesizer/wave_gen_ramp.v" 11 0 0 } }  } 0 10229 "Verilog HDL Expression warning at %2!s!: truncated literal to match %1!d! bits" 0 0 "" 0}