de2_synthesizer0.rtl.mif

build synthesizer on a de2 dev fpga board

WIDTH=16;
DEPTH=64;

ADDRESS_RADIX=UNS;
DATA_RADIX=BIN;

CONTENT BEGIN
	0 : 1011000000000000;
	1 : 1011000010000000;
	2 : 1011110001000001;
	3 : 1011110011000001;
	4 : 0011111000100000;
	5 : 1100000010100000;
	6 : 0000000001100000;
	7 : 0000000011100001;
	8 : 1000000000010000;
	9 : 0000000010010001;
	10 : 0000000101010000;
	11 : 0000010111010001;
	12 : 1101000010111000;
	13 : 0100000000010100;
	14 : 0100000110000111;
	15 : 0000001001000110;
	16 : 0000001011100000;
	17 : 0000100000010100;
	18 : 0011000010010100;
	19 : 0110111000110101;
	20 : 0100011111011101;
	21 : 1001001001111101;
	22 : 0000000101111100;
	23 : 0010010000010110;
	24 : 0000101101010110;
	25 : 1010111111010110;
	26 : 1111100001001110;
	27 : 1110000010101111;
	28 : 1001000100011000;
	29 : 0000001010011001;
	30 : 0100001110011000;
	31 : 0000101111011000;
	32 : 0000001101001110;
	33 : 1000000011001111;
	34 : 0100001111001111;
	35 : 0000000000010100;
	36 : 0000000100010100;
	37 : 0001010000000000;
	38 : 0000000000010000;
	39 : 1000000001000000;
	40 : 0000000110100000;
	41 : 0000100010100000;
	42 : 0000000100010000;
	43 : 0000000110101000;
	44 : 0110001001101000;
	45 : 1001111101101000;
	46 : 1110111011101000;
	47 : 0101111111101000;
	48 : 1001011000011000;
	49 : 0100000011100001;
	50 : 0000000000000000;
	51 : 0000000000000000;
	52 : 0000000000000000;
	53 : 0000000000000000;
	54 : 0000000000000000;
	55 : 0000000000000000;
	56 : 0000000000000000;
	57 : 0000000000000000;
	58 : 0000000000000000;
	59 : 0000000000000000;
	60 : 0000000000000000;
	61 : 0000000000000000;
	62 : 0000000000000000;
	63 : 0000000000000000;
END;