de2_synthesizer.fit.summary

来自「build synthesizer on a de2 dev fpga boar」· SUMMARY 代码 · 共 15 行

SUMMARY
15
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Fitter Status : Successful - Thu Nov 16 09:02:33 2006
Quartus II Version : 6.0 Build 202 06/20/2006 SP 1 SJ Full Version
Revision Name : DE2_synthesizer
Top-level Entity Name : DE2_synthesizer
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 1,499 / 33,216 ( 5 % )
Total registers : 342
Total pins : 423 / 475 ( 89 % )
Total virtual pins : 0
Total memory bits : 1,024 / 483,840 ( < 1 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 1 / 4 ( 25 % )

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