mux.erf

d flip flop t flip flop counter mux using active hdl can be run using 3.2 version and creating new d

MESSAGE "File: .\src\VHDL code3.vhd" 
ERROR COMP96_0018: "Identifier expected." "c:\my designs\mux\src\VHDL code3.vhd" 4 8
ERROR COMP96_0016: "Design unit declaration expected." "c:\my designs\mux\src\VHDL code3.vhd" 4 9
ERROR COMP96_0018: "Identifier expected." "c:\my designs\mux\src\VHDL code3.vhd" 9 26
ERROR COMP96_0016: "Design unit declaration expected." "c:\my designs\mux\src\VHDL code3.vhd" 9 27
MESSAGE "Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]"