compile.log

来自「d flip flop t flip flop counter mux usin」· LOG 代码 · 共 29 行

 Compilation...
 File: .\src\VHDL code3.vhd
Error:  COMP96_0018:VHDL code3.vhd : (4, 8): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error:  COMP96_0018:VHDL code3.vhd : (9, 26): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (9, 27): Design unit declaration expected.
 Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
 Compilation...
 File: .\src\VHDL code3.vhd
Error:  COMP96_0018:VHDL code3.vhd : (4, 8): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error:  COMP96_0018:VHDL code3.vhd : (9, 26): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (9, 27): Design unit declaration expected.
 Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
 Compilation...
 File: .\src\VHDL code3.vhd
Error:  COMP96_0018:VHDL code3.vhd : (4, 8): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error:  COMP96_0018:VHDL code3.vhd : (9, 26): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (9, 27): Design unit declaration expected.
 Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
 Compilation...
 File: .\src\VHDL code3.vhd
Error:  COMP96_0018:VHDL code3.vhd : (4, 8): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error:  COMP96_0018:VHDL code3.vhd : (9, 26): Identifier expected.
Error:  COMP96_0016:VHDL code3.vhd : (9, 27): Design unit declaration expected.
 Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]