console.log

d flip flop t flip flop counter mux using active hdl can be run using 3.2 version and creating new d

Design: 9:15 PM, Tuesday, March 31, 2009
Design: Opening design "c:\my designs\mux\mux.adf"
Design: Error: C:\My Designs\mux\src\VHDL code3.vhd cannot be compiled.
Compilation...
File: .\src\VHDL code3.vhd
Error: COMP96_0018: VHDL code3.vhd : (4, 8): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error: COMP96_0018: VHDL code3.vhd : (9, 26): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (9, 27): Design unit declaration expected.
Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
Compilation...
File: .\src\VHDL code3.vhd
Error: COMP96_0018: VHDL code3.vhd : (4, 8): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error: COMP96_0018: VHDL code3.vhd : (9, 26): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (9, 27): Design unit declaration expected.
Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
Compilation...
File: .\src\VHDL code3.vhd
Error: COMP96_0018: VHDL code3.vhd : (4, 8): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error: COMP96_0018: VHDL code3.vhd : (9, 26): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (9, 27): Design unit declaration expected.
Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]
Compilation...
File: .\src\VHDL code3.vhd
Error: COMP96_0018: VHDL code3.vhd : (4, 8): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (4, 9): Design unit declaration expected.
Error: COMP96_0018: VHDL code3.vhd : (9, 26): Identifier expected.
Error: COMP96_0016: VHDL code3.vhd : (9, 27): Design unit declaration expected.
Compile failure 4 Errors 0 Warnings  Analysis time :  0.0 [s]