control.vhd

来自「出租车的计费系统」· VHDL 代码 · 共 45 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity control is
        port(clk,start,stop,reset   :in std_logic;
             speed1,speed2,speed3   :in std_logic;
             clk_out,re,stop_1      :out std_logic);
end control;
architecture control_x of control is
  signal q:std_logic_vector(9 downto 0);
begin
   process(clk,start,stop,reset,speed1,speed2,speed3)
    begin
    if(start='0') then
        clk_out<='0';re<='0';stop_1<='0';
    else if(clk'event and clk='1') then
          if(start='1') then
             q<=q+1;
           end if;
         if(speed1='1') then
              clk_out<=q(0);
          else if(speed2='1') then
                 clk_out<=q(1);
               else if(speed3='1') then
                        clk_out<=q(9);
                    end if;
               end if;
            end if;
          end if;
         if(stop='1') then
             stop_1<='1';
          else
              stop_1<='0';
          end if;
         if(reset='1') then
            re<='1';
         else
            re<='0';
        end if;
       end if;
    end process;
end control_x;