lcd.mfd

来自「Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档」· MFD 代码 · 共 1,184 行 · 第 1/5 页

MDF Database:  version 1.0
MDF_INFO | lcd | XC95144XL-10-TQ144
MACROCELL | 3 | 10 | lcd_rs_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 11
INPUTS | 13 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | Msub__n0029__n0005  | flag  | counter<3>  | counter<5>  | counter<1>  | counter<2>
INPUTMC | 13 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 11 | 7 | 3 | 3 | 2 | 3 | 4 | 3 | 15 | 3 | 9
EXPORTS | 1 | 3 | 11
EQ | 7 | 
   lcd_rs = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;
    lcd_rs_OBUF.EXP  =  !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & !flag
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & !counter<5> & !counter<1> & !counter<2>

MACROCELL | 5 | 7 | data_3_OBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 17 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | counter<3>  | counter<4>  | counter<5>  | counter<1>  | counter<2>  | counter<6>  | Msub__n0029__n0005  | data_6_OBUFE/data_6_OBUFE_TRST  | EXP21_.EXP  | _13_.EXP
INPUTMC | 17 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 11 | 7 | 7 | 5 | 6 | 5 | 8
IMPORTS | 2 | 5 | 6 | 5 | 8
EQ | 40 | 
   data<3> = !state<7> & !state<9> & !state<5> & state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & state<3> & !state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & !counter<4> & 
	!counter<5> & counter<1> & counter<2> & counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & counter<4> & counter<5> & counter<2> & 
	!counter<6>
;Imported pterms FB6_7
	# !state<7> & !state<9> & state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	Msub__n0029__n0005 & !counter<4> & !counter<5> & counter<1> & 
	counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	!Msub__n0029__n0005 & !counter<4> & counter<5> & counter<1> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & !counter<4> & !counter<5> & counter<1> & 
	!counter<6>
;Imported pterms FB6_9
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	Msub__n0029__n0005 & !counter<4> & !counter<5> & !counter<1> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	Msub__n0029__n0005 & !counter<5> & !counter<1> & counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	Msub__n0029__n0005 & counter<4> & !counter<5> & counter<1> & 
	!counter<2> & !counter<6>;
   data<3>.OE = data_6_OBUFE/data_6_OBUFE_TRST;

MACROCELL | 5 | 12 | data<4>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 5 | 9
INPUTS | 16 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | Msub__n0029__n0005  | counter<1>  | counter<2>  | counter<6>  | counter<3>  | counter<5>  | counter<4>  | EXP22_.EXP  | EXP23_.EXP
INPUTMC | 16 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 11 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 2 | 3 | 4 | 3 | 3 | 5 | 11 | 5 | 13
IMPORTS | 2 | 5 | 11 | 5 | 13
EQ | 54 | 
   !data<4>_BUFR = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<1> & counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & !counter<4> & 
	counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	!counter<1> & !counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & !counter<5> & 
	!counter<1> & !counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & counter<4> & !counter<5> & !counter<1> & 
	!counter<2>
;Imported pterms FB6_12
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	Msub__n0029__n0005 & !counter<4> & !counter<5>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	Msub__n0029__n0005 & !counter<5> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & counter<5> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & counter<1> & !counter<6>
;Imported pterms FB6_11
	# state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & counter<4> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<4> & !counter<5> & 
	counter<1> & counter<6>
;Imported pterms FB6_14
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & counter<2>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<4> & counter<5> & 
	counter<1> & !counter<6>;

MACROCELL | 7 | 4 | div_counter<0>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 5 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 0 | 0
INPUTS | 11 | div_counter<0>  | flag  | clk_int  | Reset  | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>
INPUTMC | 10 | 7 | 4 | 7 | 3 | 2 | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2
INPUTP | 1 | 79
EQ | 5 | 
   div_counter<0>.D = !div_counter<0> & flag;
   div_counter<0>.CLK = clk_int;
   div_counter<0>.AR = !Reset;
   div_counter<0>.CE = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;

MACROCELL | 7 | 6 | div_counter<1>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 0 | 0
INPUTS | 12 | div_counter<0>  | div_counter<1>  | flag  | clk_int  | Reset  | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>
INPUTMC | 11 | 7 | 4 | 7 | 6 | 7 | 3 | 2 | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2
INPUTP | 1 | 79
EQ | 6 | 
   div_counter<1>.D = div_counter<0> & !div_counter<1> & flag
	# !div_counter<0> & div_counter<1> & flag;
   div_counter<1>.CLK = clk_int;
   div_counter<1>.AR = !Reset;
   div_counter<1>.CE = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;

MACROCELL | 7 | 5 | div_counter<2>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 3 | 7 | 5 | 0 | 16 | 0 | 0
INPUTS | 13 | div_counter<0>  | div_counter<1>  | flag  | div_counter<2>  | clk_int  | Reset  | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>
INPUTMC | 12 | 7 | 4 | 7 | 6 | 7 | 3 | 7 | 5 | 2 | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2
INPUTP | 1 | 79
EQ | 6 | 
   div_counter<2>.T = div_counter<2> & !flag
	# div_counter<0> & div_counter<1> & flag;
   div_counter<2>.CLK = clk_int;
   div_counter<2>.AR = !Reset;
   div_counter<2>.CE = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;

MACROCELL | 0 | 16 | div_counter<3>
ATTRIBUTES | 4326256 | 0
OUTPUTMC | 2 | 0 | 16 | 0 | 0
INPUTS | 14 | div_counter<0>  | div_counter<1>  | div_counter<2>  | flag  | div_counter<3>  | clk_int  | Reset  | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>
INPUTMC | 13 | 7 | 4 | 7 | 6 | 7 | 5 | 7 | 3 | 0 | 16 | 2 | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2
INPUTP | 1 | 79
EQ | 7 | 
   div_counter<3>.T = div_counter<3> & !flag
	# div_counter<0> & div_counter<1> & div_counter<2> & 
	flag;
   div_counter<3>.CLK = clk_int;
   div_counter<3>.AR = !Reset;
   div_counter<3>.CE = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;

MACROCELL | 3 | 1 | lcd_e_OBUF
ATTRIBUTES | 4457266 | 0
OUTPUTMC | 1 | 3 | 0
INPUTS | 9 | clkdiv  | Reset  | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>
INPUTMC | 8 | 1 | 0 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2
INPUTP | 1 | 79
EXPORTS | 1 | 3 | 0
EQ | 9 | 
   lcd_e.T = Vcc;
   lcd_e.CLK = !clkdiv;
   lcd_e.AR = !Reset;
    lcd_e_OBUF.EXP  =  !state<7> & !state<9> & state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	state<2> & !state<3> & !state<0>

MACROCELL | 5 | 16 | data<0>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 5 | 1
INPUTS | 16 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | Msub__n0029__n0005  | counter<4>  | counter<5>  | counter<1>  | counter<2>  | counter<6>  | counter<3>  | EXP25_.EXP  | EXP26_.EXP
INPUTMC | 16 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 11 | 3 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 2 | 5 | 15 | 5 | 17
IMPORTS | 2 | 5 | 15 | 5 | 17
EQ | 67 | 
   !data<0>_BUFR = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	counter<4> & counter<5> & counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	Msub__n0029__n0005 & counter<5> & !counter<1> & !counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & !counter<4> & counter<1> & !counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & counter<1> & !counter<2> & 
	counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & counter<5> & !counter<1> & counter<2> & 
	!counter<6>
;Imported pterms FB6_16
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & counter<4> & 
	!counter<5> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & counter<4> & 
	counter<1> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	counter<4> & counter<1> & counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> &