lcd.mfd

来自「Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档」· MFD 代码 · 共 1,184 行 · 第 1/5 页

MFD
1,184 行
字号
12345
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & counter<5> & counter<1> & counter<2> & 
	!counter<6>
;Imported pterms FB4_2
	# !state<7> & !state<9> & state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	state<2> & !state<3> & !state<0>
;Imported pterms FB4_18
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	Msub__n0029__n0005 & counter<5> & !counter<1> & !counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	!Msub__n0029__n0005 & !counter<5> & !counter<1> & !counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & !counter<1> & !counter<2> & 
	counter<6>
;Imported pterms FB4_17
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & !counter<4> & 
	counter<5> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	Msub__n0029__n0005 & !counter<5> & !counter<1> & counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	counter<4> & !counter<5> & counter<1> & counter<2> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	counter<4> & !counter<5> & !counter<1> & !counter<2> & 
	!counter<6>
	# state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & !counter<4> & !counter<5> & !counter<1> & 
	!counter<2> & !counter<6>;
   data<6>.OE = data_6_OBUFE/data_6_OBUFE_TRST;

MACROCELL | 5 | 10 | data_7_OBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 5 | 11
INPUTS | 13 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | data_6_OBUFE/data_6_OBUFE_TRST  | counter<3>  | counter<4>  | counter<6>  | counter<5>  | counter<1>
INPUTMC | 13 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 7 | 7 | 3 | 2 | 3 | 3 | 3 | 5 | 3 | 4 | 3 | 15
EXPORTS | 1 | 5 | 11
EQ | 11 | 
   data<7> = state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;
   data<7>.OE = data_6_OBUFE/data_6_OBUFE_TRST;
    data_7_OBUFE.EXP  =  state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & counter<4> & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<4> & !counter<5> & 
	counter<1> & counter<6>

MACROCELL | 5 | 4 | state<7>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 16 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | counter<3>  | Msub__n0029__n0005  | counter<4>  | counter<5>  | counter<1>  | counter<2>  | counter<6>  | clk_int  | Reset
INPUTMC | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 2 | 15
INPUTP | 1 | 79
EQ | 6 | 
   state<7>.D = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & 
	!Msub__n0029__n0005 & !counter<4> & counter<5> & !counter<1> & 
	!counter<2> & !counter<6>;
   state<7>.CLK = clk_int;
   state<7>.AR = !Reset;

MACROCELL | 5 | 2 | state<9>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 13 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | counter<4>  | counter<5>  | _10_.EXP  | _12_.EXP  | clk_int  | Reset
INPUTMC | 12 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 3 | 3 | 4 | 5 | 1 | 5 | 3 | 2 | 15
INPUTP | 1 | 79
IMPORTS | 2 | 5 | 1 | 5 | 3
EQ | 24 | 
   state<9>.D = state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>
	# !state<7> & !state<9> & !state<5> & !state<4> & 
	state<2> & !state<3> & !state<0>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<4> & !counter<5>
;Imported pterms FB6_2
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	!counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<1> & !counter<6>
;Imported pterms FB6_4
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<4> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<3> & 
	!Msub__n0029__n0005 & !counter<5> & !counter<1> & !counter<2>;
   state<9>.CLK = clk_int;
   state<9>.AR = !Reset;

MACROCELL | 7 | 0 | state<5>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 10 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | flag  | clk_int  | Reset
INPUTMC | 9 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 7 | 3 | 2 | 15
INPUTP | 1 | 79
EQ | 4 | 
   state<5>.D = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !flag;
   state<5>.CLK = clk_int;
   state<5>.AR = !Reset;

MACROCELL | 0 | 17 | state<4>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 15 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | counter<5>  | counter<6>  | counter<3>  | counter<4>  | Msub__n0029__n0005  | EXP14_.EXP  | clk_int  | Reset
INPUTMC | 14 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 4 | 3 | 5 | 3 | 2 | 3 | 3 | 3 | 11 | 0 | 0 | 2 | 15
INPUTP | 1 | 79
IMPORTS | 1 | 0 | 0
EQ | 20 | 
   state<4>.D = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<5> & counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & counter<4> & 
	counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	counter<4> & counter<6>
;Imported pterms FB1_1
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<4> & counter<1> & 
	counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<4> & counter<2> & 
	counter<6>
	# div_counter<0> & div_counter<1> & div_counter<2> & 
	div_counter<3> & !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & flag;
   state<4>.CLK = clk_int;
   state<4>.AR = !Reset;

MACROCELL | 7 | 17 | state<2>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 14 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | clk_int  | Reset  | Msub__n0029__n0005  | counter<4>  | counter<5>  | counter<1>  | counter<6>
INPUTMC | 13 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 2 | 15 | 3 | 11 | 3 | 3 | 3 | 4 | 3 | 15 | 3 | 5
INPUTP | 1 | 79
EXPORTS | 1 | 7 | 16
EQ | 7 | 
   state<2>.D = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & state<0>;
   state<2>.CLK = clk_int;
   state<2>.AR = !Reset;
    state<2>.EXP  =  !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & !counter<1> & counter<6>

MACROCELL | 7 | 1 | state<3>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 9 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | clk_int  | Reset
INPUTMC | 8 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 2 | 15
INPUTP | 1 | 79
EQ | 4 | 
   state<3>.D = !state<7> & !state<9> & state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0>;
   state<3>.CLK = clk_int;
   state<3>.AR = !Reset;

MACROCELL | 2 | 15 | clk_int
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 19 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5
INPUTS | 2 | clkdiv  | Reset
INPUTMC | 1 | 1 | 0
INPUTP | 1 | 79
EQ | 3 | 
   clk_int.T = Vcc;
   clk_int.CLK = clkdiv;
   clk_int.AR = !Reset;

MACROCELL | 7 | 2 | state<0>
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 53 | 3 | 10 | 5 | 7 | 5 | 12 | 7 | 4 | 7 | 6 | 7 | 5 | 0 | 16 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 10 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 2 | 3 | 11 | 3 | 3 | 7 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 8 | 7 | 7 | 0 | 0 | 3 | 1 | 3 | 7 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 1 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 14 | 5 | 15 | 5 | 17 | 7 | 8 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14 | 7 | 16
INPUTS | 9 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | clk_int  | Reset
INPUTMC | 8 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 2 | 15
INPUTP | 1 | 79
EQ | 4 | 
   state<0>.D = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & state<3> & !state<0>;
   state<0>.CLK = clk_int;
   state<0>.AR = !Reset;

MACROCELL | 3 | 2 | counter<3>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 31 | 5 | 7 | 5 | 12 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 4 | 5 | 1 | 0 | 17 | 3 | 2 | 3 | 10 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 10 | 5 | 11 | 5 | 15 | 5 | 17 | 7 | 9 | 7 | 11 | 7 | 13 | 7 | 14
INPUTS | 17 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | Msub__n0029__n0005  | counter<1>  | counter<2>  | counter<6>  | counter<4>  | counter<5>  | counter<3>  | flag  | clk_int  | Reset
INPUTMC | 16 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 11 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 3 | 3 | 4 | 3 | 2 | 7 | 3 | 2 | 15
INPUTP | 1 | 79
EQ | 10 | 
   counter<3>.T = !state<7> & !state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & counter<3> & !flag
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	counter<1> & counter<2> & !counter<6>
	# !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & Msub__n0029__n0005 & 
	!counter<4> & !counter<5> & counter<1> & counter<2>;
   counter<3>.CLK = clk_int;
   counter<3>.AR = !Reset;

MACROCELL | 3 | 11 | Msub__n0029__n0005
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 34 | 5 | 7 | 5 | 12 | 5 | 16 | 7 | 15 | 3 | 13 | 7 | 10 | 3 | 0 | 5 | 4 | 5 | 1 | 0 | 17 | 3 | 2 | 3 | 10 | 3 | 3 | 3 | 4 | 3 | 15 | 3 | 9 | 3 | 5 | 3 | 11 | 3 | 12 | 3 | 14 | 3 | 16 | 3 | 17 | 5 | 0 | 5 | 3 | 5 | 6 | 5 | 8 | 5 | 11 | 5 | 13 | 5 | 15 | 7 | 9 | 7 | 11 | 7 | 14 | 7 | 16 | 7 | 17
INPUTS | 16 | state<7>  | state<9>  | state<5>  | state<4>  | state<2>  | state<3>  | state<0>  | counter<6>  | counter<4>  | counter<5>  | Msub__n0029__n0005  | counter<1>  | counter<2>  | lcd_rs_OBUF.EXP  | clk_int  | Reset
INPUTMC | 15 | 5 | 4 | 5 | 2 | 7 | 0 | 0 | 17 | 7 | 17 | 7 | 1 | 7 | 2 | 3 | 5 | 3 | 3 | 3 | 4 | 3 | 11 | 3 | 15 | 3 | 9 | 3 | 10 | 2 | 15
INPUTP | 1 | 79
EXPORTS | 1 | 3 | 12
IMPORTS | 1 | 3 | 10
EQ | 16 | 
   Msub__n0029__n0005.T = !state<7> & state<9> & !state<5> & !state<4> & 
	!state<2> & !state<3> & !state<0> & !counter<6>
12345

lcd.mfd - 源码说明

本页面展示了「Mars-XC2S50-S-Core-V2.0开发板核心板的说明和设计文档」中的 lcd.mfd 源码文件，采用 MFD 编程语言编写，共 1,184 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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