prev_cmp_hw1.sim.qmsg

一个模拟ISA界面的简易小程式

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 9.0 Build 132 02/25/2009 SJ Web Edition " "Info: Version 9.0 Build 132 02/25/2009 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Wed Apr 08 03:24:37 2009 " "Info: Processing started: Wed Apr 08 03:24:37 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off hw1 -c hw1 " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off hw1 -c hw1" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "ISDB_SOURCE_VECTOR_FILE_USED" "H:/Digital Interface HW/hw1/hw1-IORead.vwf " "Info: Using vector source file \"H:/Digital Interface HW/hw1/hw1-IORead.vwf\"" {  } {  } 0 0 "Using vector source file \"%1!s!\"" 0 0 "" 0 -1}
{ "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_FOUND" "" "Info: Inverted registers were found during simulation" { { "Info" "ISIM_SIM_INVERTED_REGISTER_OUTPUT_NAME" "\|CUD\|IOCS16~reg0 " "Info: Register: \|CUD\|IOCS16~reg0" {  } {  } 0 0 "Register: %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Inverted registers were found during simulation" 0 0 "" 0 -1}
{ "Info" "IEDS_MAX_TRANSITION_COUNT" "" "Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled" { { "Info" "IEDS_MAX_TRANSITION_COUNT_EXP" "" "Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." {  } {  } 0 0 "Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements." 0 0 "" 0 -1}  } {  } 0 0 "Option to preserve fewer signal transitions to reduce memory requirements is enabled" 0 0 "" 0 -1}
{ "Info" "IEDS_SUB_SIMULATION_COUNT" "1 " "Info: Simulation partitioned into 1 sub-simulations" {  } {  } 0 0 "Simulation partitioned into %1!d! sub-simulations" 0 0 "" 0 -1}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     42.08 % " "Info: Simulation coverage is      42.08 %" {  } {  } 0 0 "Simulation coverage is %1!s!" 0 0 "" 0 -1}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "706 " "Info: Number of transitions in simulation is 706" {  } {  } 0 0 "Number of transitions in simulation is %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 0 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "130 " "Info: Peak virtual memory: 130 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Wed Apr 08 03:25:16 2009 " "Info: Processing ended: Wed Apr 08 03:25:16 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:39 " "Info: Elapsed time: 00:00:39" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}