📄 isp_baud_gen.v
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////////////////////////////////////////////////////////////////////////
//
// Abstract: Uart has an auto-tuning baud rate generator
// This is an auto-tuning baud rate generator.
// Module : BAUD_GEN.v
//
// Version : ver 01.00
//
// Modification History:
// Date By Change Description
// -----------------------------------------------------------------
// 2008/06/24 jackie
// YYYY/MM/DD author Revision content
//
////////////////////////////////////////////////////////////////////////`timescale 1ns/1nsmodule BAUD_GEN( rst, clk, rxd, baud_out);parameter BAUD19200 = 11'd103;parameter SYN_NUM = 8'd4;parameter SYN_OFFSET = 8'd160;parameter delay = 1'b1;input rst;input clk;input rxd;output baud_out;reg [14:0] posedge_cnt;reg [14:0] negedge_cnt;reg [14:0] baud_value;reg [10:0] baud_value1;reg [14:0] baud_cnt;reg [7:0] syn_cnt;reg rxd_q;reg syn_ok;reg syn_ok_q;reg go_pos_cnt;reg go_neg_cnt;wire rx_baudrate;wire [10:0] baud_value_tmp ;assign baud_value_tmp = syn_ok?baud_value1:BAUD19200;assign baud_out = rx_baudrate; assign rx_baudrate = ((baud_cnt<=(baud_value_tmp))&&(baud_cnt>=(baud_value_tmp>>1)))?1'b1:1'b0;// capture a edge:baud_generatealways @(posedge clk)begin if(rst) baud_cnt <= #delay 15'd0; else begin baud_cnt <= #delay baud_cnt+1'd1; if((baud_cnt>=(baud_value_tmp))) baud_cnt <= #delay 15'd0; endend//delay_syn_okalways @(posedge clk)begin if(rst) syn_ok_q <= #delay 1'b0; else syn_ok_q <= #delay syn_ok;end//delay_rxdalways @(posedge clk)begin if(rst) rxd_q <= #delay 1'b1; else rxd_q <= #delay rxd;end//go_posedge_cntalways @( posedge clk)begin if(rst) go_pos_cnt <= #delay 1'b0; else if((!rxd_q)&&rxd) go_pos_cnt <= #delay 1'b1; else if((!rxd)&&rxd_q) go_pos_cnt <= #delay 1'b0; end//go_negedge_cntalways @( posedge clk)begin if(rst) go_neg_cnt <= #delay 1'b0; else if((!rxd)&&rxd_q) go_neg_cnt <= #delay 1'b1; else if((!rxd_q)&&rxd) go_neg_cnt <= #delay 1'b0; end//posedge_countalways @(posedge clk)begin if(rst) posedge_cnt <= #delay 15'd0; else if(go_pos_cnt) posedge_cnt <= #delay posedge_cnt + 15'd1; else if((!rxd_q)&&rxd) posedge_cnt <= #delay 15'd0; end//negedge_countalways @( posedge clk)begin if(rst) negedge_cnt <= #delay 15'd0; else if(go_neg_cnt) negedge_cnt <= #delay negedge_cnt + 15'd1; else if((!rxd)&&rxd_q) negedge_cnt <= #delay 15'd0; end//syn_countalways @( posedge clk)begin if(rst) syn_cnt <= #delay 7'd0; else if (rxd&&(!rxd_q)&&(!syn_ok)) begin if((negedge_cnt>(posedge_cnt-SYN_OFFSET))&&(negedge_cnt<(posedge_cnt+SYN_OFFSET))) syn_cnt <= #delay syn_cnt + 7'd1; else syn_cnt <= #delay 7'd0; endend//synchronizationalways @(posedge clk)begin if(rst) syn_ok <= #delay 1'b0; else if(syn_cnt>=SYN_NUM) syn_ok <= #delay 1'b1; end//baudrate_valuealways @(posedge clk)begin if(rst) baud_value <= #delay 13'h1fff; else if((!rxd)&&rxd_q) baud_value <= #delay ((posedge_cnt+negedge_cnt+5'd16)>>5); end//always @(posedge clk)begin if(rst) baud_value1 <= #delay BAUD19200; else if((!syn_ok_q)&&syn_ok) baud_value1 <= #delay baud_value[10:0];endendmodule
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