miaobiao.fit.qmsg

VHDL语言设计的秒表

{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Info: Finished Fast Input/Output/OE register processing" {  } {  } 0 0 "Finished Fast Input/Output/OE register processing" 0 0}
{ "Info" "IFYGR_FYGR_INFO_AUTO_MODE_REGISTER_PACKING" "Auto Normal " "Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option" {  } {  } 0 0 "Fitter is using %2!s! packing mode for logic elements with %1!s! setting for Auto Packed Registers logic option" 0 0}
{ "Info" "IFSAC_FSAC_START_LUT_IO_RAM_PACKING" "" "Info: Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" {  } {  } 0 0 "Moving registers into I/O cells, LUTs, and RAM blocks to improve timing and density" 0 0}
{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0 0 "Finished moving registers into I/O cells, LUTs, and RAM blocks" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0 0 "Finished register packing" 0 0}
{ "Warning" "WCUT_CUT_UNATTACHED_ASGN" "" "Warning: Ignored locations or region assignments to the following nodes" { { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "9 " "Warning: Node \"9\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "9" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "a13 " "Warning: Node \"a13\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "a13" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "b12 " "Warning: Node \"b12\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "b12" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "c9 " "Warning: Node \"c9\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "c9" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "d10 " "Warning: Node \"d10\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "d10" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "daout " "Warning: Node \"daout\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "daout" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "e11 " "Warning: Node \"e11\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "e11" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "f8 " "Warning: Node \"f8\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "f8" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "lamp " "Warning: Node \"lamp\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "lamp" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "led " "Warning: Node \"led\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "led" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0} { "Warning" "WCUT_CUT_UNATTACHED_ASGN_SUB" "sel " "Warning: Node \"sel\" is assigned to location or region, but does not exist in design" {  } { { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "sel" } } } }  } 0 0 "Node \"%1!s!\" is assigned to location or region, but does not exist in design" 0 0}  } {  } 0 0 "Ignored locations or region assignments to the following nodes" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0 0 "Fitter placement preparation operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0 0 "Fitter placement operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0 0 "Fitter placement was successful" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0 0 "Fitter placement operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "2.952 ns register register " "Info: Estimated most critical path is register to register delay of 2.952 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns second:inst2\|count\[3\] 1 REG LAB_X14_Y15 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X14_Y15; Fanout = 4; REG Node = 'second:inst2\|count\[3\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "" { second:inst2|count[3] } "NODE_NAME" } "" } } { "second.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/second.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.150 ns) + CELL(0.590 ns) 0.740 ns rtl~200 2 COMB LAB_X14_Y15 8 " "Info: 2: + IC(0.150 ns) + CELL(0.590 ns) = 0.740 ns; Loc. = LAB_X14_Y15; Fanout = 8; COMB Node = 'rtl~200'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "0.740 ns" { second:inst2|count[3] rtl~200 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.222 ns) + CELL(0.442 ns) 1.404 ns second:inst2\|count\[6\]~331 3 COMB LAB_X14_Y15 7 " "Info: 3: + IC(0.222 ns) + CELL(0.442 ns) = 1.404 ns; Loc. = LAB_X14_Y15; Fanout = 7; COMB Node = 'second:inst2\|count\[6\]~331'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "0.664 ns" { rtl~200 second:inst2|count[6]~331 } "NODE_NAME" } "" } } { "second.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/second.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.436 ns) + CELL(1.112 ns) 2.952 ns second:inst2\|count\[3\] 4 REG LAB_X14_Y15 4 " "Info: 4: + IC(0.436 ns) + CELL(1.112 ns) = 2.952 ns; Loc. = LAB_X14_Y15; Fanout = 4; REG Node = 'second:inst2\|count\[3\]'" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "1.548 ns" { second:inst2|count[6]~331 second:inst2|count[3] } "NODE_NAME" } "" } } { "second.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/second.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.144 ns ( 72.63 % ) " "Info: Total cell delay = 2.144 ns ( 72.63 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.808 ns ( 27.37 % ) " "Info: Total interconnect delay = 0.808 ns ( 27.37 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "2.952 ns" { second:inst2|count[3] rtl~200 second:inst2|count[6]~331 second:inst2|count[3] } "NODE_NAME" } "" } }  } 0 0 "Estimated most critical path is %2!s! to %3!s! delay of %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Info: Fitter routing operations beginning" {  } {  } 0 0 "Fitter routing operations beginning" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 0 " "Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%" {  } {  } 0 0 "Average interconnect usage is %1!d!%% of the available device resources. Peak interconnect usage is %2!d!%%" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Info: Fitter routing operations ending: elapsed time is 00:00:01" {  } {  } 0 0 "Fitter routing operations ending: elapsed time is %1!s!" 0 0}
{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Info: Optimizations that may affect the design's routability were skipped" {  } {  } 0 0 "Optimizations that may affect the design's routability were skipped" 0 0} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Info: Optimizations that may affect the design's timing were skipped" {  } {  } 0 0 "Optimizations that may affect the design's timing were skipped" 0 0}  } {  } 0 0 "The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time." 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Fixed Delay Chain Operation " "Info: Completed Fixed Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Delay Chain Operation " "Info: Completed Auto Delay Chain Operation" {  } {  } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE_TOP_MSG" "msecond:inst1\|ensec~4 " "Info: Node msecond:inst1\|ensec~4 uses non-global routing resources to route signals to global destination nodes" { { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear msecond:inst1\|ensec " "Info: Port clear -- assigned as a global for destination node msecond:inst1\|ensec -- routed using non-global resources" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "" { msecond:inst1|ensec } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "msecond:inst1\|ensec" } } } } { "msecond.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/msecond.vhd" 7 -1 0 } } { "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" "" { msecond:inst1|ensec } "NODE_NAME" } }  } 0 0 "Port %1!s! -- assigned as a global for destination node %2!s! -- routed using non-global resources" 0 0} { "Info" "IFSAC_FSAC_GLOBAL_CLK_USES_LAB_LINE" "clear second:inst2\|enmin " "Info: Port clear -- assigned as a global for destination node second:inst2\|enmin -- routed using non-global resources" {  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "" { second:inst2|enmin } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "second:inst2\|enmin" } } } } { "second.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/second.vhd" 7 -1 0 } } { "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" "" { second:inst2|enmin } "NODE_NAME" } }  } 0 0 "Port %1!s! -- assigned as a global for destination node %2!s! -- routed using non-global resources" 0 0}  } { { "f:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "f:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "miaobiao" "UNKNOWN" "V1" "C:/Documents and Settings/Administrator/桌面/miaobiao/db/miaobiao.quartus_db" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/" "" "" { msecond:inst1|ensec~4 } "NODE_NAME" } "" } } { "f:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "f:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "msecond:inst1\|ensec~4" } } } } { "msecond.vhd" "" { Text "C:/Documents and Settings/Administrator/桌面/miaobiao/msecond.vhd" 7 -1 0 } } { "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" { Floorplan "C:/Documents and Settings/Administrator/桌面/miaobiao/miaobiao.fld" "" "" { msecond:inst1|ensec~4 } "NODE_NAME" } }  } 0 0 "Node %1!s! uses non-global routing resources to route signals to global destination nodes" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 12 s Quartus II " "Info: Quartus II Fitter was successful. 0 errors, 12 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sat Jun 07 01:42:37 2008 " "Info: Processing ended: Sat Jun 07 01:42:37 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:10 " "Info: Elapsed time: 00:00:10" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}