alu.fit.eqn

这是一个用vhdl语言实现的比较完整的ALU,可以用作其他cPU设计的部件

--A1L571 is n~127 at LC4_B37
--operation mode is normal

A1L571 = !A1L771 & (op[0] # !A1L082 # !op[1]);

--A1L871 is n~135 at LC4_B37
--operation mode is normal

A1L871 = !A1L771 & (op[0] # !A1L082 # !op[1]);


--C1L2 is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node~3 at LC4_B32
--operation mode is arithmetic

C1L2 = A1L781 $ A1L981;

--C1L3 is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node~16 at LC4_B32
--operation mode is arithmetic

C1L3 = A1L781 $ A1L981;

--C1_cin_node is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node at LC4_B32
--operation mode is arithmetic

C1_cin_node = CARRY(A1L781 $ A1L981);


--A1L89 is Mux~4974 at LC8_B27
--operation mode is normal

A1L89 = A1L013 & b[2] & !op[1] & !op[0];

--A1L561 is Mux~5051 at LC8_B27
--operation mode is normal

A1L561 = A1L013 & b[2] & !op[1] & !op[0];


--A1L99 is Mux~4975 at LC3_B27
--operation mode is normal

A1L99 = !A1L89 & (op[0] & (op[1] # !A1L73) # !op[0] & !op[1]);

--A1L661 is Mux~5052 at LC3_B27
--operation mode is normal

A1L661 = !A1L89 & (op[0] & (op[1] # !A1L73) # !op[0] & !op[1]);

--A1L761 is Mux~5053 at LC3_B27
--operation mode is normal

A1L761 = !A1L89 & (op[0] & (op[1] # !A1L73) # !op[0] & !op[1]);


--A1L101 is Mux~4984 at LC4_B27
--operation mode is normal

A1L101 = (b[2] # op[1] # op[0] # !A1L113) & CASCADE(A1L761);

--A1L861 is Mux~5054 at LC4_B27
--operation mode is normal

A1L861 = (b[2] # op[1] # op[0] # !A1L113) & CASCADE(A1L761);


--A1L201 is Mux~4985 at LC5_B28
--operation mode is normal

A1L201 = (b[2] # op[1] # !op[0] # !A1L803) & CASCADE(A1L371);

--A1L961 is Mux~5055 at LC5_B28
--operation mode is normal

A1L961 = (b[2] # op[1] # !op[0] # !A1L803) & CASCADE(A1L371);


--A1L881 is reduce_nor~75 at LC2_B36
--operation mode is normal

A1L881 = !A1L47 & !A1L28 & !A1L09 & !A1L79;

--A1L191 is reduce_nor~80 at LC2_B36
--operation mode is normal

A1L191 = !A1L47 & !A1L28 & !A1L09 & !A1L79;

--A1L291 is reduce_nor~81 at LC2_B36
--operation mode is normal

A1L291 = !A1L47 & !A1L28 & !A1L09 & !A1L79;


--A1L091 is reduce_nor~78 at LC3_B36
--operation mode is normal

A1L091 = (!A1L24 & !A1L05 & !A1L85 & !A1L66) & CASCADE(A1L291);

--A1L391 is reduce_nor~82 at LC3_B36
--operation mode is normal

A1L391 = (!A1L24 & !A1L05 & !A1L85 & !A1L66) & CASCADE(A1L291);


--A1L671 is n~131 at LC6_B37
--operation mode is normal

A1L671 = E3L03 # !op[0] # !op[1] # !A1L082;

--A1L971 is n~136 at LC6_B37
--operation mode is normal

A1L971 = E3L03 # !op[0] # !op[1] # !A1L082;

--A1L081 is n~137 at LC6_B37
--operation mode is normal

A1L081 = E3L03 # !op[0] # !op[1] # !A1L082;


--A1L771 is n~133 at LC7_B37
--operation mode is normal

A1L771 = (A1L082 & op[1] & op[0] # !A1L79) & CASCADE(A1L081);

--A1L181 is n~138 at LC7_B37
--operation mode is normal

A1L181 = (A1L082 & op[1] & op[0] # !A1L79) & CASCADE(A1L081);


--A1L781 is reduce_nor~4 at LC8_B37
--operation mode is normal

A1L781 = op[1] # op[3] # op[2] # !op[0];

--A1L491 is reduce_nor~83 at LC8_B37
--operation mode is normal

A1L491 = op[1] # op[3] # op[2] # !op[0];


--A1L981 is reduce_nor~77 at LC3_B37
--operation mode is normal

A1L981 = op[3] # op[2] # !op[0] # !op[1];

--A1L591 is reduce_nor~84 at LC3_B37
--operation mode is normal

A1L591 = op[3] # op[2] # !op[0] # !op[1];


--A1L213 is y~2453 at LC2_B50
--operation mode is normal

A1L213 = b[1] & A1L352 # !b[1] & (A1L192);

--A1L143 is y~2482 at LC2_B50
--operation mode is normal

A1L143 = b[1] & A1L352 # !b[1] & (A1L192);


--A1L001 is Mux~4982 at LC3_B28
--operation mode is normal

A1L001 = op[0] & (op[1] # !A1L213 # !b[2]) # !op[0] & !op[1];

--A1L071 is Mux~5056 at LC3_B28
--operation mode is normal

A1L071 = op[0] & (op[1] # !A1L213 # !b[2]) # !op[0] & !op[1];

--A1L171 is Mux~5057 at LC3_B28
--operation mode is normal

A1L171 = op[0] & (op[1] # !A1L213 # !b[2]) # !op[0] & !op[1];


--A1L301 is Mux~4986 at LC4_B28
--operation mode is normal

A1L301 = (op[1] # op[0] # !A1L39 & !A1L49) & CASCADE(A1L171);

--A1L271 is Mux~5058 at LC4_B28
--operation mode is normal

A1L271 = (op[1] # op[0] # !A1L39 & !A1L49) & CASCADE(A1L171);

--A1L371 is Mux~5059 at LC4_B28
--operation mode is normal

A1L371 = (op[1] # op[0] # !A1L39 & !A1L49) & CASCADE(A1L171);


--A1L42 is ADDER_in_datab[7]~224 at LC2_B38
--operation mode is normal

A1L42 = b[7] $ (op[3] # op[2] # !op[0]);

--A1L52 is ADDER_in_datab[7]~232 at LC2_B38
--operation mode is normal

A1L52 = b[7] $ (op[3] # op[2] # !op[0]);


--A1L01 is ADDER_in_datab[0]~225 at LC1_B32
--operation mode is normal

A1L01 = b[0] $ (op[3] # op[2] # !op[0]);

--A1L11 is ADDER_in_datab[0]~233 at LC1_B32
--operation mode is normal

A1L11 = b[0] $ (op[3] # op[2] # !op[0]);


--A1L21 is ADDER_in_datab[1]~226 at LC2_B32
--operation mode is normal

A1L21 = b[1] $ (op[3] # op[2] # !op[0]);

--A1L31 is ADDER_in_datab[1]~234 at LC2_B32
--operation mode is normal

A1L31 = b[1] $ (op[3] # op[2] # !op[0]);


--A1L41 is ADDER_in_datab[2]~227 at LC3_B32
--operation mode is normal

A1L41 = b[2] $ (op[3] # op[2] # !op[0]);

--A1L51 is ADDER_in_datab[2]~235 at LC3_B32
--operation mode is normal

A1L51 = b[2] $ (op[3] # op[2] # !op[0]);


--A1L61 is ADDER_in_datab[3]~228 at LC1_B38
--operation mode is normal

A1L61 = b[3] $ (op[3] # op[2] # !op[0]);

--A1L71 is ADDER_in_datab[3]~236 at LC1_B38
--operation mode is normal

A1L71 = b[3] $ (op[3] # op[2] # !op[0]);


--A1L81 is ADDER_in_datab[4]~229 at LC1_B39
--operation mode is normal

A1L81 = b[4] $ (op[3] # op[2] # !op[0]);

--A1L91 is ADDER_in_datab[4]~237 at LC1_B39
--operation mode is normal

A1L91 = b[4] $ (op[3] # op[2] # !op[0]);


--A1L02 is ADDER_in_datab[5]~230 at LC7_B34
--operation mode is normal

A1L02 = b[5] $ (op[3] # op[2] # !op[0]);

--A1L12 is ADDER_in_datab[5]~238 at LC7_B34
--operation mode is normal

A1L12 = b[5] $ (op[3] # op[2] # !op[0]);


--A1L22 is ADDER_in_datab[6]~231 at LC1_B29
--operation mode is normal

A1L22 = b[6] $ (op[3] # op[2] # !op[0]);

--A1L32 is ADDER_in_datab[6]~239 at LC1_B29
--operation mode is normal

A1L32 = b[6] $ (op[3] # op[2] # !op[0]);


--E3L52 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~157 at LC4_B34
--operation mode is arithmetic

E3L52 = E3_cout[6];

--E3L72 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~172 at LC4_B34
--operation mode is arithmetic

E3L72 = E3_cout[6];

--E3L42 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~156 at LC4_B34
--operation mode is arithmetic

E3L42 = CARRY(E3_cout[6]);


--E3L03 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~161 at LC6_B34
--operation mode is normal

E3L03 = E3_cout[7];

--E3L23 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~173 at LC6_B34
--operation mode is normal

E3L23 = E3_cout[7];


--a[7] is a[7] at PIN_75
--operation mode is input

a[7] = INPUT();


--a[6] is a[6] at PIN_74
--operation mode is input

a[6] = INPUT();


--b[0] is b[0] at PIN_53
--operation mode is input

b[0] = INPUT();


--a[5] is a[5] at PIN_73
--operation mode is input

a[5] = INPUT();


--a[4] is a[4] at PIN_71
--operation mode is input

a[4] = INPUT();


--b[1] is b[1] at PIN_54
--operation mode is input

b[1] = INPUT();


--a[3] is a[3] at PIN_70
--operation mode is input

a[3] = INPUT();


--a[2] is a[2] at PIN_69
--operation mode is input

a[2] = INPUT();


--a[1] is a[1] at PIN_68
--operation mode is input

a[1] = INPUT();


--a[0] is a[0] at PIN_67
--operation mode is input

a[0] = INPUT();


--b[2] is b[2] at PIN_55
--operation mode is input

b[2] = INPUT();


--op[1] is op[1] at PIN_94
--operation mode is input

op[1] = INPUT();


--op[0] is op[0] at PIN_93
--operation mode is input

op[0] = INPUT();


--op[3] is op[3] at PIN_96
--operation mode is input

op[3] = INPUT();


--op[2] is op[2] at PIN_95
--operation mode is input

op[2] = INPUT();


--b[3] is b[3] at PIN_56
--operation mode is input

b[3] = INPUT();


--b[4] is b[4] at PIN_57
--operation mode is input

b[4] = INPUT();


--b[5] is b[5] at PIN_58
--operation mode is input

b[5] = INPUT();


--b[6] is b[6] at PIN_60
--operation mode is input

b[6] = INPUT();


--b[7] is b[7] at PIN_61
--operation mode is input

b[7] = INPUT();


--result[0] is result[0] at PIN_111
--operation mode is output

result[0] = OUTPUT(A1L24);


--result[1] is result[1] at PIN_112
--operation mode is output

result[1] = OUTPUT(A1L05);


--result[2] is result[2] at PIN_113
--operation mode is output

result[2] = OUTPUT(A1L85);


--result[3] is result[3] at PIN_114
--operation mode is output

result[3] = OUTPUT(A1L66);


--result[4] is result[4] at PIN_115
--operation mode is output

result[4] = OUTPUT(A1L47);


--result[5] is result[5] at PIN_116
--operation mode is output

result[5] = OUTPUT(A1L28);


--result[6] is result[6] at PIN_119
--operation mode is output

result[6] = OUTPUT(A1L09);


--result[7] is result[7] at PIN_120
--operation mode is output

result[7] = OUTPUT(A1L79);


--c is c at PIN_190
--operation mode is output

c = OUTPUT(A1L63);


--z is z at PIN_191
--operation mode is output

z = OUTPUT(A1L343);


--v is v at PIN_192
--operation mode is output

v = OUTPUT(A1L972);


--n is n at PIN_193
--operation mode is output

n = OUTPUT(A1L571);


--A1L63 is c~0 at LC1_B33
--operation mode is normal

A1L63 = E3L03;


--A1L343 is z~0 at LC7_B36
--operation mode is normal

A1L343 = A1L091;