alu.fit.eqn

这是一个用vhdl语言实现的比较完整的ALU,可以用作其他cPU设计的部件

--A1L732 is sll_r[6]~499 at LC5_B31
--operation mode is normal

A1L732 = b[1] & (a[0] & !b[0]) # !b[1] & A1L802;

--A1L932 is sll_r[6]~507 at LC5_B31
--operation mode is normal

A1L932 = b[1] & (a[0] & !b[0]) # !b[1] & A1L802;


--A1L722 is sll_r[2]~500 at LC2_B31
--operation mode is normal

A1L722 = A1L732 & !b[2];

--A1L822 is sll_r[2]~508 at LC2_B31
--operation mode is normal

A1L822 = A1L732 & !b[2];


--A1L15 is Mux~4920 at LC3_B48
--operation mode is normal

A1L15 = op[1] & (op[0]) # !op[1] & (op[0] & A1L162 # !op[0] & (A1L722));

--A1L811 is Mux~5004 at LC3_B48
--operation mode is normal

A1L811 = op[1] & (op[0]) # !op[1] & (op[0] & A1L162 # !op[0] & (A1L722));


--A1L542 is sra_r[2]~579 at LC7_B47
--operation mode is normal

A1L542 = b[1] & a[7] # !b[1] & (b[0] & a[7] # !b[0] & (a[6]));

--A1L742 is sra_r[2]~588 at LC7_B47
--operation mode is normal

A1L742 = b[1] & a[7] # !b[1] & (b[0] & a[7] # !b[0] & (a[6]));


--A1L642 is sra_r[2]~580 at LC3_B47
--operation mode is normal

A1L642 = b[2] & A1L542 # !b[2] & (A1L003);

--A1L842 is sra_r[2]~589 at LC3_B47
--operation mode is normal

A1L842 = b[2] & A1L542 # !b[2] & (A1L003);


--A1L25 is Mux~4921 at LC4_B48
--operation mode is normal

A1L25 = op[1] & (A1L15 & (A1L642) # !A1L15 & A1L902) # !op[1] & (A1L15);

--A1L911 is Mux~5005 at LC4_B48
--operation mode is normal

A1L911 = op[1] & (A1L15 & (A1L642) # !A1L15 & A1L902) # !op[1] & (A1L15);


--A1L35 is Mux~4922 at LC6_B48
--operation mode is normal

A1L35 = op[1] & (a[2] $ (b[2] # op[0])) # !op[1] & (b[2] & (a[2] # op[0]) # !b[2] & a[2] & op[0]);

--A1L021 is Mux~5006 at LC6_B48
--operation mode is normal

A1L021 = op[1] & (a[2] $ (b[2] # op[0])) # !op[1] & (b[2] & (a[2] # op[0]) # !b[2] & a[2] & op[0]);


--E3_cs_buffer[2] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC7_B32
--operation mode is arithmetic

E3_cs_buffer[2] = a[2] $ A1L41 $ E3_cout[1];

--E3L61 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~166 at LC7_B32
--operation mode is arithmetic

E3L61 = a[2] $ A1L41 $ E3_cout[1];

--E3_cout[2] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cout[2] at LC7_B32
--operation mode is arithmetic

E3_cout[2] = CARRY(a[2] & (E3_cout[1] # !A1L41) # !a[2] & !A1L41 & E3_cout[1]);


--A1L45 is Mux~4923 at LC7_B48
--operation mode is normal

A1L45 = op[3] & (op[2]) # !op[3] & (op[2] & A1L35 # !op[2] & (!E3_cs_buffer[2]));

--A1L121 is Mux~5007 at LC7_B48
--operation mode is normal

A1L121 = op[3] & (op[2]) # !op[3] & (op[2] & A1L35 # !op[2] & (!E3_cs_buffer[2]));


--A1L103 is y~2442 at LC8_B47
--operation mode is normal

A1L103 = b[1] & A1L782 # !b[1] & (A1L372);

--A1L033 is y~2471 at LC8_B47
--operation mode is normal

A1L033 = b[1] & A1L782 # !b[1] & (A1L372);


--A1L55 is Mux~4924 at LC1_B47
--operation mode is normal

A1L55 = b[2] & A1L103 # !b[2] & (A1L003);

--A1L221 is Mux~5008 at LC1_B47
--operation mode is normal

A1L221 = b[2] & A1L103 # !b[2] & (A1L003);


--A1L203 is y~2443 at LC5_B42
--operation mode is normal

A1L203 = b[0] & a[3] # !b[0] & (a[4]);

--A1L133 is y~2472 at LC5_B42
--operation mode is normal

A1L133 = b[0] & a[3] # !b[0] & (a[4]);


--A1L303 is y~2444 at LC7_B42
--operation mode is normal

A1L303 = b[0] & a[5] # !b[0] & (a[6]);

--A1L233 is y~2473 at LC7_B42
--operation mode is normal

A1L233 = b[0] & a[5] # !b[0] & (a[6]);


--A1L403 is y~2445 at LC4_B42
--operation mode is normal

A1L403 = b[1] & A1L203 # !b[1] & (A1L303);

--A1L333 is y~2474 at LC4_B42
--operation mode is normal

A1L333 = b[1] & A1L203 # !b[1] & (A1L303);


--A1L503 is y~2446 at LC8_B42
--operation mode is normal

A1L503 = b[0] & a[7] # !b[0] & (a[0]);

--A1L433 is y~2475 at LC8_B42
--operation mode is normal

A1L433 = b[0] & a[7] # !b[0] & (a[0]);


--A1L603 is y~2447 at LC6_B31
--operation mode is normal

A1L603 = b[1] & A1L503 # !b[1] & (A1L802);

--A1L533 is y~2476 at LC6_B31
--operation mode is normal

A1L533 = b[1] & A1L503 # !b[1] & (A1L802);


--A1L65 is Mux~4925 at LC3_B31
--operation mode is normal

A1L65 = b[2] & A1L403 # !b[2] & (A1L603);

--A1L321 is Mux~5009 at LC3_B31
--operation mode is normal

A1L321 = b[2] & A1L403 # !b[2] & (A1L603);


--A1L75 is Mux~4926 at LC8_B48
--operation mode is normal

A1L75 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L55 # !op[0] & (A1L65));

--A1L421 is Mux~5010 at LC8_B48
--operation mode is normal

A1L421 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L55 # !op[0] & (A1L65));


--A1L85 is Mux~4927 at LC5_B48
--operation mode is normal

A1L85 = op[3] & (A1L45 & (A1L75) # !A1L45 & A1L25) # !op[3] & (A1L45);

--A1L521 is Mux~5011 at LC5_B48
--operation mode is normal

A1L521 = op[3] & (A1L45 & (A1L75) # !A1L45 & A1L25) # !op[3] & (A1L45);


--A1L95 is Mux~4928 at LC3_B38
--operation mode is normal

A1L95 = op[1] & (a[3] $ (b[3] # op[0])) # !op[1] & (b[3] & (a[3] # op[0]) # !b[3] & a[3] & op[0]);

--A1L621 is Mux~5012 at LC3_B38
--operation mode is normal

A1L621 = op[1] & (a[3] $ (b[3] # op[0])) # !op[1] & (b[3] & (a[3] # op[0]) # !b[3] & a[3] & op[0]);


--A1L922 is sll_r[3]~501 at LC2_B40
--operation mode is normal

A1L922 = !b[2] & (b[1] & A1L332 # !b[1] & (A1L592));

--A1L032 is sll_r[3]~509 at LC2_B40
--operation mode is normal

A1L032 = !b[2] & (b[1] & A1L332 # !b[1] & (A1L592));


--A1L312 is sla_r[3]~835 at LC3_B40
--operation mode is normal

A1L312 = A1L922 # b[2] & a[0];

--A1L412 is sla_r[3]~845 at LC3_B40
--operation mode is normal

A1L412 = A1L922 # b[2] & a[0];


--A1L352 is sra_r[5]~581 at LC1_B21
--operation mode is normal

A1L352 = b[0] & a[6] # !b[0] & (a[5]);

--A1L552 is sra_r[5]~590 at LC1_B21
--operation mode is normal

A1L552 = b[0] & a[6] # !b[0] & (a[5]);


--A1L362 is srl_r[3]~743 at LC5_B50
--operation mode is normal

A1L362 = !b[2] & (b[1] & A1L352 # !b[1] & (A1L192));

--A1L562 is srl_r[3]~752 at LC5_B50
--operation mode is normal

A1L562 = !b[2] & (b[1] & A1L352 # !b[1] & (A1L192));


--A1L462 is srl_r[3]~744 at LC3_B51
--operation mode is normal

A1L462 = A1L362 # b[2] & a[7] & !A1L982;

--A1L662 is srl_r[3]~753 at LC3_B51
--operation mode is normal

A1L662 = A1L362 # b[2] & a[7] & !A1L982;


--A1L06 is Mux~4929 at LC4_B40
--operation mode is normal

A1L06 = op[1] & (op[0]) # !op[1] & (op[0] & A1L462 # !op[0] & (A1L922));

--A1L721 is Mux~5013 at LC4_B40
--operation mode is normal

A1L721 = op[1] & (op[0]) # !op[1] & (op[0] & A1L462 # !op[0] & (A1L922));


--A1L942 is sra_r[3]~582 at LC6_B50
--operation mode is normal

A1L942 = A1L362 # b[2] & a[7];

--A1L052 is sra_r[3]~591 at LC6_B50
--operation mode is normal

A1L052 = A1L362 # b[2] & a[7];


--A1L16 is Mux~4930 at LC5_B40
--operation mode is normal

A1L16 = op[1] & (A1L06 & (A1L942) # !A1L06 & A1L312) # !op[1] & (A1L06);

--A1L821 is Mux~5014 at LC5_B40
--operation mode is normal

A1L821 = op[1] & (A1L06 & (A1L942) # !A1L06 & A1L312) # !op[1] & (A1L06);


--E3_cs_buffer[3] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC8_B32
--operation mode is arithmetic

E3_cs_buffer[3] = a[3] $ A1L61 $ E3_cout[2];

--E3L81 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~167 at LC8_B32
--operation mode is arithmetic

E3L81 = a[3] $ A1L61 $ E3_cout[2];

--E3_cout[3] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cout[3] at LC8_B32
--operation mode is arithmetic

E3_cout[3] = CARRY(a[3] & (E3_cout[2] # !A1L61) # !a[3] & !A1L61 & E3_cout[2]);


--A1L26 is Mux~4931 at LC6_B40
--operation mode is normal

A1L26 = op[2] & (op[3]) # !op[2] & (op[3] & A1L16 # !op[3] & (!E3_cs_buffer[3]));

--A1L921 is Mux~5015 at LC6_B40
--operation mode is normal

A1L921 = op[2] & (op[3]) # !op[2] & (op[3] & A1L16 # !op[3] & (!E3_cs_buffer[3]));


--A1L703 is y~2448 at LC8_B50
--operation mode is normal

A1L703 = b[0] & a[0] # !b[0] & (a[7]);

--A1L633 is y~2477 at LC8_B50
--operation mode is normal

A1L633 = b[0] & a[0] # !b[0] & (a[7]);


--A1L803 is y~2449 at LC1_B50
--operation mode is normal

A1L803 = b[1] & A1L292 # !b[1] & (A1L703);

--A1L733 is y~2478 at LC1_B50
--operation mode is normal

A1L733 = b[1] & A1L292 # !b[1] & (A1L703);


--A1L36 is Mux~4932 at LC4_B50
--operation mode is normal

A1L36 = A1L362 # b[2] & A1L803;

--A1L031 is Mux~5016 at LC4_B50
--operation mode is normal

A1L031 = A1L362 # b[2] & A1L803;


--A1L903 is y~2450 at LC5_B35
--operation mode is normal

A1L903 = b[1] & A1L692 # !b[1] & (A1L892);

--A1L833 is y~2479 at LC5_B35
--operation mode is normal

A1L833 = b[1] & A1L692 # !b[1] & (A1L892);


--A1L46 is Mux~4933 at LC7_B40
--operation mode is normal

A1L46 = A1L922 # b[2] & A1L903;

--A1L131 is Mux~5017 at LC7_B40
--operation mode is normal

A1L131 = A1L922 # b[2] & A1L903;


--A1L56 is Mux~4934 at LC8_B40
--operation mode is normal

A1L56 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L36 # !op[0] & (A1L46));

--A1L231 is Mux~5018 at LC8_B40
--operation mode is normal

A1L231 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L36 # !op[0] & (A1L46));


--A1L66 is Mux~4935 at LC1_B40
--operation mode is normal

A1L66 = op[2] & (A1L26 & (A1L56) # !A1L26 & A1L95) # !op[2] & (A1L26);

--A1L331 is Mux~5019 at LC1_B40
--operation mode is normal

A1L331 = op[2] & (A1L26 & (A1L56) # !A1L26 & A1L95) # !op[2] & (A1L26);


--A1L013 is y~2451 at LC2_B42
--operation mode is normal

A1L013 = b[1] & A1L802 # !b[1] & (A1L203);

--A1L933 is y~2480 at LC2_B42
--operation mode is normal

A1L933 = b[1] & A1L802 # !b[1] & (A1L203);


--A1L512 is sla_r[4]~836 at LC6_B51
--operation mode is normal

A1L512 = b[2] & a[0] # !b[2] & (A1L013);

--A1L612 is sla_r[4]~846 at LC6_B51
--operation mode is normal

A1L612 = b[2] & a[0] # !b[2] & (A1L013);


--A1L762 is srl_r[4]~745 at LC2_B43
--operation mode is normal

A1L762 = !b[2] & (b[1] & A1L372 # !b[1] & (A1L482));

--A1L862 is srl_r[4]~754 at LC2_B43
--operation mode is normal

A1L862 = !b[2] & (b[1] & A1L372 # !b[1] & (A1L482));


--A1L132 is sll_r[4]~502 at LC8_B51
--operation mode is normal

A1L132 = b[2] & (a[0] & !A1L982) # !b[2] & A1L013;

--A1L232 is sll_r[4]~510 at LC8_B51
--operation mode is normal

A1L232 = b[2] & (a[0] & !A1L982) # !b[2] & A1L013;


--A1L76 is Mux~4936 at LC2_B39
--operation mode is normal

A1L76 = op[1] & (op[0]) # !op[1] & (op[0] & A1L762 # !op[0] & (A1L132));

--A1L431 is Mux~5020 at LC2_B39
--operation mode is normal

A1L431 = op[1] & (op[0]) # !op[1] & (op[0] & A1L762 # !op[0] & (A1L132));


--A1L152 is sra_r[4]~583 at LC1_B43
--operation mode is normal

A1L152 = A1L762 # b[2] & a[7];

--A1L252 is sra_r[4]~592 at LC1_B43
--operation mode is normal

A1L252 = A1L762 # b[2] & a[7];


--A1L86 is Mux~4937 at LC3_B39
--operation mode is normal

A1L86 = op[1] & (A1L76 & (A1L152) # !A1L76 & A1L512) # !op[1] & (A1L76);

--A1L531 is Mux~5021 at LC3_B39
--operation mode is normal

A1L531 = op[1] & (A1L76 & (A1L152) # !A1L76 & A1L512) # !op[1] & (A1L76);


--A1L96 is Mux~4938 at LC4_B39
--operation mode is normal

A1L96 = op[1] & (a[4] $ (b[4] # op[0])) # !op[1] & (b[4] & (a[4] # op[0]) # !b[4] & a[4] & op[0]);

--A1L631 is Mux~5022 at LC4_B39
--operation mode is normal

A1L631 = op[1] & (a[4] $ (b[4] # op[0])) # !op[1] & (b[4] & (a[4] # op[0]) # !b[4] & a[4] & op[0]);


--E3_cs_buffer[4] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC1_B34
--operation mode is arithmetic

E3_cs_buffer[4] = a[4] $ A1L81 $ E3_cout[3];

--E3L02 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~168 at LC1_B34
--operation mode is arithmetic

E3L02 = a[4] $ A1L81 $ E3_cout[3];