alu.map.eqn

这是一个用vhdl语言实现的比较完整的ALU,可以用作其他cPU设计的部件

--A1L58 is Mux~4955
--operation mode is normal

A1L58 = op[3] & (op[2]) # !op[3] & (op[2] & A1L48 # !op[2] & (!E3_cs_buffer[6]));

--A1L251 is Mux~5039
--operation mode is normal

A1L251 = op[3] & (op[2]) # !op[3] & (op[2] & A1L48 # !op[2] & (!E3_cs_buffer[6]));


--A1L68 is Mux~4956
--operation mode is normal

A1L68 = b[2] & A1L992 # !b[2] & (A1L003);

--A1L351 is Mux~5040
--operation mode is normal

A1L351 = b[2] & A1L992 # !b[2] & (A1L003);


--A1L78 is Mux~4957
--operation mode is normal

A1L78 = b[2] & A1L503 # !b[2] & (A1L303);

--A1L451 is Mux~5041
--operation mode is normal

A1L451 = b[2] & A1L503 # !b[2] & (A1L303);


--A1L88 is Mux~4958
--operation mode is normal

A1L88 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L68 # !op[0] & (A1L78));

--A1L551 is Mux~5042
--operation mode is normal

A1L551 = op[1] & (!op[0]) # !op[1] & (op[0] & A1L68 # !op[0] & (A1L78));


--A1L98 is Mux~4959
--operation mode is normal

A1L98 = op[3] & (A1L58 & (A1L88) # !A1L58 & A1L38) # !op[3] & (A1L58);

--A1L651 is Mux~5043
--operation mode is normal

A1L651 = op[3] & (A1L58 & (A1L88) # !A1L58 & A1L38) # !op[3] & (A1L58);


--A1L09 is Mux~4960
--operation mode is normal

A1L09 = op[1] & (a[7] $ (b[7] # op[0])) # !op[1] & (b[7] & (a[7] # op[0]) # !b[7] & a[7] & op[0]);

--A1L751 is Mux~5044
--operation mode is normal

A1L751 = op[1] & (a[7] $ (b[7] # op[0])) # !op[1] & (b[7] & (a[7] # op[0]) # !b[7] & a[7] & op[0]);


--A1L19 is Mux~4961
--operation mode is normal

A1L19 = A1L73 & op[0] & a[7];

--A1L851 is Mux~5045
--operation mode is normal

A1L851 = A1L73 & op[0] & a[7];


--A1L29 is Mux~4962
--operation mode is normal

A1L29 = b[2] & (b[1] & A1L232 # !b[1] & (A1L492));

--A1L951 is Mux~5046
--operation mode is normal

A1L951 = b[2] & (b[1] & A1L232 # !b[1] & (A1L492));


--A1L39 is Mux~4963
--operation mode is normal

A1L39 = !b[2] & (b[1] & A1L592 # !b[1] & (A1L792));

--A1L061 is Mux~5047
--operation mode is normal

A1L061 = !b[2] & (b[1] & A1L592 # !b[1] & (A1L792));


--A1L49 is Mux~4964
--operation mode is normal

A1L49 = A1L19 # !op[0] & (A1L29 # A1L39);

--A1L161 is Mux~5048
--operation mode is normal

A1L161 = A1L19 # !op[0] & (A1L29 # A1L39);


--E3_cs_buffer[7] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]
--operation mode is arithmetic

E3_cs_buffer[7] = a[7] $ A1L42 $ E3L42;

--E3L13 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~171
--operation mode is arithmetic

E3L13 = a[7] $ A1L42 $ E3L42;

--E3_cout[7] is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cout[7]
--operation mode is arithmetic

E3_cout[7] = CARRY(a[7] & (E3L42 # !A1L42) # !a[7] & !A1L42 & E3L42);


--A1L59 is Mux~4965
--operation mode is normal

A1L59 = op[2] & (op[3]) # !op[2] & (op[3] & A1L49 # !op[3] & (!E3_cs_buffer[7]));

--A1L261 is Mux~5049
--operation mode is normal

A1L261 = op[2] & (op[3]) # !op[2] & (op[3] & A1L49 # !op[3] & (!E3_cs_buffer[7]));


--A1L69 is Mux~4967
--operation mode is normal

A1L69 = op[2] & (A1L59 & (!A1L101) # !A1L59 & A1L09) # !op[2] & (A1L59);

--A1L361 is Mux~5050
--operation mode is normal

A1L361 = op[2] & (A1L59 & (!A1L101) # !A1L59 & A1L09) # !op[2] & (A1L59);


--A1L772 is v~162
--operation mode is normal

A1L772 = !op[1] & !op[3] & !op[2];

--A1L082 is v~165
--operation mode is normal

A1L082 = !op[1] & !op[3] & !op[2];


--A1L872 is v~163
--operation mode is normal

A1L872 = A1L772 & (E3L52 & A1L42 & !a[7] # !E3L52 & !A1L42 & a[7]);

--A1L182 is v~166
--operation mode is normal

A1L182 = A1L772 & (E3L52 & A1L42 & !a[7] # !E3L52 & !A1L42 & a[7]);


--A1L972 is v~164
--operation mode is normal

A1L972 = !op[3] & !op[2];

--A1L282 is v~167
--operation mode is normal

A1L282 = !op[3] & !op[2];


--A1L471 is n~127
--operation mode is normal

A1L471 = !A1L671 & (op[0] # !A1L972 # !op[1]);

--A1L771 is n~135
--operation mode is normal

A1L771 = !A1L671 & (op[0] # !A1L972 # !op[1]);


--C1L2 is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node~3
--operation mode is arithmetic

C1L2 = A1L681 $ A1L881;

--C1L3 is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node~16
--operation mode is arithmetic

C1L3 = A1L681 $ A1L881;

--C1_cin_node is lpm_add_sub:ALU_ADDER|addcore:adder|cin_node
--operation mode is arithmetic

C1_cin_node = CARRY(A1L681 $ A1L881);


--A1L79 is Mux~4974
--operation mode is normal

A1L79 = A1L903 & b[2] & !op[1] & !op[0];

--A1L461 is Mux~5051
--operation mode is normal

A1L461 = A1L903 & b[2] & !op[1] & !op[0];


--A1L89 is Mux~4975
--operation mode is normal

A1L89 = !A1L79 & (op[0] & (op[1] # !A1L63) # !op[0] & !op[1]);

--A1L561 is Mux~5052
--operation mode is normal

A1L561 = !A1L79 & (op[0] & (op[1] # !A1L63) # !op[0] & !op[1]);

--A1L661 is Mux~5053
--operation mode is normal

A1L661 = !A1L79 & (op[0] & (op[1] # !A1L63) # !op[0] & !op[1]);


--A1L001 is Mux~4984
--operation mode is normal

A1L001 = (b[2] # op[1] # op[0] # !A1L013) & CASCADE(A1L661);

--A1L761 is Mux~5054
--operation mode is normal

A1L761 = (b[2] # op[1] # op[0] # !A1L013) & CASCADE(A1L661);


--A1L101 is Mux~4985
--operation mode is normal

A1L101 = (b[2] # op[1] # !op[0] # !A1L703) & CASCADE(A1L271);

--A1L861 is Mux~5055
--operation mode is normal

A1L861 = (b[2] # op[1] # !op[0] # !A1L703) & CASCADE(A1L271);


--A1L781 is reduce_nor~75
--operation mode is normal

A1L781 = !A1L37 & !A1L18 & !A1L98 & !A1L69;

--A1L091 is reduce_nor~80
--operation mode is normal

A1L091 = !A1L37 & !A1L18 & !A1L98 & !A1L69;

--A1L191 is reduce_nor~81
--operation mode is normal

A1L191 = !A1L37 & !A1L18 & !A1L98 & !A1L69;


--A1L981 is reduce_nor~78
--operation mode is normal

A1L981 = (!A1L14 & !A1L94 & !A1L75 & !A1L56) & CASCADE(A1L191);

--A1L291 is reduce_nor~82
--operation mode is normal

A1L291 = (!A1L14 & !A1L94 & !A1L75 & !A1L56) & CASCADE(A1L191);


--A1L571 is n~131
--operation mode is normal

A1L571 = E3L03 # !op[0] # !op[1] # !A1L972;

--A1L871 is n~136
--operation mode is normal

A1L871 = E3L03 # !op[0] # !op[1] # !A1L972;

--A1L971 is n~137
--operation mode is normal

A1L971 = E3L03 # !op[0] # !op[1] # !A1L972;


--A1L671 is n~133
--operation mode is normal

A1L671 = (A1L972 & op[1] & op[0] # !A1L69) & CASCADE(A1L971);

--A1L081 is n~138
--operation mode is normal

A1L081 = (A1L972 & op[1] & op[0] # !A1L69) & CASCADE(A1L971);


--A1L681 is reduce_nor~4
--operation mode is normal

A1L681 = op[1] # op[3] # op[2] # !op[0];

--A1L391 is reduce_nor~83
--operation mode is normal

A1L391 = op[1] # op[3] # op[2] # !op[0];


--A1L881 is reduce_nor~77
--operation mode is normal

A1L881 = op[3] # op[2] # !op[0] # !op[1];

--A1L491 is reduce_nor~84
--operation mode is normal

A1L491 = op[3] # op[2] # !op[0] # !op[1];


--A1L113 is y~2453
--operation mode is normal

A1L113 = b[1] & A1L252 # !b[1] & (A1L092);

--A1L043 is y~2482
--operation mode is normal

A1L043 = b[1] & A1L252 # !b[1] & (A1L092);


--A1L99 is Mux~4982
--operation mode is normal

A1L99 = op[0] & (op[1] # !A1L113 # !b[2]) # !op[0] & !op[1];

--A1L961 is Mux~5056
--operation mode is normal

A1L961 = op[0] & (op[1] # !A1L113 # !b[2]) # !op[0] & !op[1];

--A1L071 is Mux~5057
--operation mode is normal

A1L071 = op[0] & (op[1] # !A1L113 # !b[2]) # !op[0] & !op[1];


--A1L201 is Mux~4986
--operation mode is normal

A1L201 = (op[1] # op[0] # !A1L29 & !A1L39) & CASCADE(A1L071);

--A1L171 is Mux~5058
--operation mode is normal

A1L171 = (op[1] # op[0] # !A1L29 & !A1L39) & CASCADE(A1L071);

--A1L271 is Mux~5059
--operation mode is normal

A1L271 = (op[1] # op[0] # !A1L29 & !A1L39) & CASCADE(A1L071);


--A1L42 is ADDER_in_datab[7]~224
--operation mode is normal

A1L42 = b[7] $ (op[3] # op[2] # !op[0]);

--A1L52 is ADDER_in_datab[7]~232
--operation mode is normal

A1L52 = b[7] $ (op[3] # op[2] # !op[0]);


--A1L01 is ADDER_in_datab[0]~225
--operation mode is normal

A1L01 = b[0] $ (op[3] # op[2] # !op[0]);

--A1L11 is ADDER_in_datab[0]~233
--operation mode is normal

A1L11 = b[0] $ (op[3] # op[2] # !op[0]);


--A1L21 is ADDER_in_datab[1]~226
--operation mode is normal

A1L21 = b[1] $ (op[3] # op[2] # !op[0]);

--A1L31 is ADDER_in_datab[1]~234
--operation mode is normal

A1L31 = b[1] $ (op[3] # op[2] # !op[0]);


--A1L41 is ADDER_in_datab[2]~227
--operation mode is normal

A1L41 = b[2] $ (op[3] # op[2] # !op[0]);

--A1L51 is ADDER_in_datab[2]~235
--operation mode is normal

A1L51 = b[2] $ (op[3] # op[2] # !op[0]);


--A1L61 is ADDER_in_datab[3]~228
--operation mode is normal

A1L61 = b[3] $ (op[3] # op[2] # !op[0]);

--A1L71 is ADDER_in_datab[3]~236
--operation mode is normal

A1L71 = b[3] $ (op[3] # op[2] # !op[0]);


--A1L81 is ADDER_in_datab[4]~229
--operation mode is normal

A1L81 = b[4] $ (op[3] # op[2] # !op[0]);

--A1L91 is ADDER_in_datab[4]~237
--operation mode is normal

A1L91 = b[4] $ (op[3] # op[2] # !op[0]);


--A1L02 is ADDER_in_datab[5]~230
--operation mode is normal

A1L02 = b[5] $ (op[3] # op[2] # !op[0]);

--A1L12 is ADDER_in_datab[5]~238
--operation mode is normal

A1L12 = b[5] $ (op[3] # op[2] # !op[0]);


--A1L22 is ADDER_in_datab[6]~231
--operation mode is normal

A1L22 = b[6] $ (op[3] # op[2] # !op[0]);

--A1L32 is ADDER_in_datab[6]~239
--operation mode is normal

A1L32 = b[6] $ (op[3] # op[2] # !op[0]);


--E3L52 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~157
--operation mode is arithmetic

E3L52 = E3_cout[6];

--E3L72 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~172
--operation mode is arithmetic

E3L72 = E3_cout[6];

--E3L42 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~156
--operation mode is arithmetic

E3L42 = CARRY(E3_cout[6]);


--E3L03 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~161
--operation mode is normal

E3L03 = E3_cout[7];

--E3L23 is lpm_add_sub:ALU_ADDER|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~173
--operation mode is normal

E3L23 = E3_cout[7];


--a[7] is a[7]
--operation mode is input

a[7] = INPUT();


--a[6] is a[6]
--operation mode is input

a[6] = INPUT();


--b[0] is b[0]
--operation mode is input

b[0] = INPUT();


--a[5] is a[5]
--operation mode is input

a[5] = INPUT();


--a[4] is a[4]
--operation mode is input

a[4] = INPUT();


--b[1] is b[1]
--operation mode is input

b[1] = INPUT();


--a[3] is a[3]
--operation mode is input

a[3] = INPUT();


--a[2] is a[2]
--operation mode is input

a[2] = INPUT();


--a[1] is a[1]
--operation mode is input

a[1] = INPUT();


--a[0] is a[0]
--operation mode is input

a[0] = INPUT();


--b[2] is b[2]
--operation mode is input

b[2] = INPUT();


--op[1] is op[1]
--operation mode is input

op[1] = INPUT();


--op[0] is op[0]
--operation mode is input

op[0] = INPUT();


--op[3] is op[3]
--operation mode is input

op[3] = INPUT();


--op[2] is op[2]
--operation mode is input

op[2] = INPUT();


--b[3] is b[3]
--operation mode is input

b[3] = INPUT();


--b[4] is b[4]
--operation mode is input

b[4] = INPUT();


--b[5] is b[5]
--operation mode is input

b[5] = INPUT();


--b[6] is b[6]
--operation mode is input

b[6] = INPUT();


--b[7] is b[7]
--operation mode is input

b[7] = INPUT();


--result[0] is result[0]
--operation mode is output

result[0] = OUTPUT(A1L14);


--result[1] is result[1]
--operation mode is output

result[1] = OUTPUT(A1L94);


--result[2] is result[2]
--operation mode is output

result[2] = OUTPUT(A1L75);


--result[3] is result[3]
--operation mode is output

result[3] = OUTPUT(A1L56);


--result[4] is result[4]
--operation mode is output

result[4] = OUTPUT(A1L37);


--result[5] is result[5]
--operation mode is output

result[5] = OUTPUT(A1L18);


--result[6] is result[6]
--operation mode is output

result[6] = OUTPUT(A1L98);


--result[7] is result[7]
--operation mode is output

result[7] = OUTPUT(A1L69);


--c is c
--operation mode is output

c = OUTPUT(E3L03);


--z is z
--operation mode is output

z = OUTPUT(A1L981);


--v is v
--operation mode is output

v = OUTPUT(A1L872);


--n is n
--operation mode is output

n = OUTPUT(A1L471);