shifter.hier_info

这是一个用vHDL语言实现的移位器

|shifter
data_in[0] => Mux~0.IN11
data_in[0] => Mux~6.IN9
data_in[0] => Mux~6.IN10
data_in[0] => Mux~6.IN11
data_in[0] => Mux~7.IN5
data_in[0] => Mux~7.IN6
data_in[0] => Mux~7.IN7
data_in[0] => Mux~7.IN8
data_in[0] => Mux~7.IN9
data_in[0] => Mux~7.IN10
data_in[0] => Mux~7.IN11
data_in[1] => Mux~5.IN9
data_in[1] => Mux~5.IN10
data_in[1] => Mux~5.IN11
data_in[1] => Mux~6.IN3
data_in[1] => Mux~6.IN4
data_in[1] => Mux~6.IN5
data_in[1] => Mux~6.IN6
data_in[1] => Mux~6.IN7
data_in[1] => Mux~6.IN8
data_in[1] => Mux~7.IN2
data_in[1] => Mux~7.IN3
data_in[1] => Mux~7.IN4
data_in[2] => Mux~4.IN9
data_in[2] => Mux~4.IN10
data_in[2] => Mux~4.IN11
data_in[2] => Mux~5.IN3
data_in[2] => Mux~5.IN4
data_in[2] => Mux~5.IN5
data_in[2] => Mux~5.IN6
data_in[2] => Mux~5.IN7
data_in[2] => Mux~5.IN8
data_in[2] => Mux~6.IN0
data_in[2] => Mux~6.IN1
data_in[2] => Mux~6.IN2
data_in[3] => Mux~3.IN9
data_in[3] => Mux~3.IN10
data_in[3] => Mux~3.IN11
data_in[3] => Mux~4.IN3
data_in[3] => Mux~4.IN4
data_in[3] => Mux~4.IN5
data_in[3] => Mux~4.IN6
data_in[3] => Mux~4.IN7
data_in[3] => Mux~4.IN8
data_in[3] => Mux~5.IN0
data_in[3] => Mux~5.IN1
data_in[3] => Mux~5.IN2
data_in[4] => Mux~2.IN9
data_in[4] => Mux~2.IN10
data_in[4] => Mux~2.IN11
data_in[4] => Mux~3.IN3
data_in[4] => Mux~3.IN4
data_in[4] => Mux~3.IN5
data_in[4] => Mux~3.IN6
data_in[4] => Mux~3.IN7
data_in[4] => Mux~3.IN8
data_in[4] => Mux~4.IN0
data_in[4] => Mux~4.IN1
data_in[4] => Mux~4.IN2
data_in[5] => Mux~1.IN9
data_in[5] => Mux~1.IN10
data_in[5] => Mux~1.IN11
data_in[5] => Mux~2.IN3
data_in[5] => Mux~2.IN4
data_in[5] => Mux~2.IN5
data_in[5] => Mux~2.IN6
data_in[5] => Mux~2.IN7
data_in[5] => Mux~2.IN8
data_in[5] => Mux~3.IN0
data_in[5] => Mux~3.IN1
data_in[5] => Mux~3.IN2
data_in[6] => Mux~0.IN8
data_in[6] => Mux~0.IN9
data_in[6] => Mux~0.IN10
data_in[6] => Mux~1.IN3
data_in[6] => Mux~1.IN4
data_in[6] => Mux~1.IN5
data_in[6] => Mux~1.IN6
data_in[6] => Mux~1.IN7
data_in[6] => Mux~1.IN8
data_in[6] => Mux~2.IN0
data_in[6] => Mux~2.IN1
data_in[6] => Mux~2.IN2
data_in[7] => Mux~0.IN1
data_in[7] => Mux~0.IN2
data_in[7] => Mux~0.IN3
data_in[7] => Mux~0.IN4
data_in[7] => Mux~0.IN5
data_in[7] => Mux~0.IN6
data_in[7] => Mux~0.IN7
data_in[7] => Mux~1.IN0
data_in[7] => Mux~1.IN1
data_in[7] => Mux~1.IN2
data_in[7] => Mux~7.IN1
n[0] => Mux~0.IN12
n[0] => Mux~1.IN12
n[0] => Mux~2.IN12
n[0] => Mux~3.IN12
n[0] => Mux~4.IN12
n[0] => Mux~5.IN12
n[0] => Mux~6.IN12
n[0] => Mux~7.IN12
n[1] => Mux~8.IN1
n[1] => Mux~9.IN1
n[1] => Mux~10.IN0
n[1] => Mux~11.IN0
n[1] => Mux~12.IN0
n[1] => Mux~13.IN0
n[1] => Mux~14.IN1
n[1] => Mux~15.IN1
n[2] => Mux~16.IN1
n[2] => Mux~17.IN1
n[2] => Mux~18.IN1
n[2] => Mux~19.IN1
n[2] => Mux~20.IN1
n[2] => Mux~21.IN1
n[2] => Mux~22.IN1
n[2] => Mux~23.IN1
dir => Mux~0.IN13
dir => Mux~1.IN13
dir => Mux~2.IN13
dir => Mux~3.IN13
dir => Mux~4.IN13
dir => Mux~5.IN13
dir => Mux~6.IN13
dir => Mux~7.IN13
dir => Mux~8.IN2
dir => Mux~9.IN2
dir => Mux~10.IN1
dir => Mux~11.IN1
dir => Mux~12.IN1
dir => Mux~13.IN1
dir => Mux~14.IN2
dir => Mux~15.IN2
dir => Mux~16.IN2
dir => Mux~17.IN2
dir => Mux~18.IN2
dir => Mux~19.IN2
dir => Mux~20.IN2
dir => Mux~21.IN2
dir => Mux~22.IN2
dir => Mux~23.IN2
kind[0] => Mux~0.IN15
kind[0] => Mux~1.IN15
kind[0] => Mux~2.IN15
kind[0] => Mux~3.IN15
kind[0] => Mux~4.IN15
kind[0] => Mux~5.IN15
kind[0] => Mux~6.IN15
kind[0] => Mux~7.IN15
kind[0] => Mux~8.IN4
kind[0] => Mux~9.IN4
kind[0] => Mux~10.IN3
kind[0] => Mux~11.IN3
kind[0] => Mux~12.IN3
kind[0] => Mux~13.IN3
kind[0] => Mux~14.IN4
kind[0] => Mux~15.IN4
kind[0] => Mux~16.IN4
kind[0] => Mux~17.IN4
kind[0] => Mux~18.IN4
kind[0] => Mux~19.IN4
kind[0] => Mux~20.IN4
kind[0] => Mux~21.IN4
kind[0] => Mux~22.IN4
kind[0] => Mux~23.IN4
kind[1] => Mux~0.IN14
kind[1] => Mux~1.IN14
kind[1] => Mux~2.IN14
kind[1] => Mux~3.IN14
kind[1] => Mux~4.IN14
kind[1] => Mux~5.IN14
kind[1] => Mux~6.IN14
kind[1] => Mux~7.IN14
kind[1] => Mux~8.IN3
kind[1] => Mux~9.IN3
kind[1] => Mux~10.IN2
kind[1] => Mux~11.IN2
kind[1] => Mux~12.IN2
kind[1] => Mux~13.IN2
kind[1] => Mux~14.IN3
kind[1] => Mux~15.IN3
kind[1] => Mux~16.IN3
kind[1] => Mux~17.IN3
kind[1] => Mux~18.IN3
kind[1] => Mux~19.IN3
kind[1] => Mux~20.IN3
kind[1] => Mux~21.IN3
kind[1] => Mux~22.IN3
kind[1] => Mux~23.IN3
clock => x[7].CLK
clock => x[6].CLK
clock => x[5].CLK
clock => x[4].CLK
clock => x[3].CLK
clock => x[2].CLK
clock => x[1].CLK
clock => x[0].CLK
clock => y[7].CLK
clock => y[6].CLK
clock => y[5].CLK
clock => y[4].CLK
clock => y[3].CLK
clock => y[2].CLK
clock => y[1].CLK
clock => y[0].CLK
clock => data_out[7]~reg0.CLK
clock => data_out[6]~reg0.CLK
clock => data_out[5]~reg0.CLK
clock => data_out[4]~reg0.CLK
clock => data_out[3]~reg0.CLK
clock => data_out[2]~reg0.CLK
clock => data_out[1]~reg0.CLK
clock => data_out[0]~reg0.CLK
data_out[0] <= data_out[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[1] <= data_out[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[2] <= data_out[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[3] <= data_out[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[4] <= data_out[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[5] <= data_out[5]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[6] <= data_out[6]~reg0.DB_MAX_OUTPUT_PORT_TYPE
data_out[7] <= data_out[7]~reg0.DB_MAX_OUTPUT_PORT_TYPE