shifter.map.summary

这是一个用vHDL语言实现的移位器

Flow Status : Successful - Tue Aug 23 16:21:46 2005
Quartus II Version : 5.0 Build 148 04/26/2005 SJ Full Version
Revision Name : shifter
Top-level Entity Name : shifter
Family : ACEX1K
Device : EP1K100QC208-3
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 135
Total pins : 23
Total memory bits : 0
Total PLLs : 0