hamming.map.qmsg

一个vhdl实现的hamming码编码器

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Apr 10 23:13:41 2009 " "Info: Processing started: Fri Apr 10 23:13:41 2009" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off hamming -c hamming --analyze_project " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off hamming -c hamming --analyze_project" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "hamming.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file hamming.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 hamming-behav " "Info: Found design unit 1: hamming-behav" {  } { { "hamming.vhd" "" { Text "G:/组成实验/1.1编码实验：Hamming码/hamming.vhd" 16 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 hamming " "Info: Found entity 1: hamming" {  } { { "hamming.vhd" "" { Text "G:/组成实验/1.1编码实验：Hamming码/hamming.vhd" 7 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "hamming " "Info: Elaborating entity \"hamming\" for the top level hierarchy" {  } {  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "p hamming.vhd(19) " "Warning: VHDL Process Statement warning at hamming.vhd(19): signal or variable \"p\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"p\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "hamming.vhd" "" { Text "G:/组成实验/1.1编码实验：Hamming码/hamming.vhd" 19 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "data_ham hamming.vhd(19) " "Warning: VHDL Process Statement warning at hamming.vhd(19): signal or variable \"data_ham\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"data_ham\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "hamming.vhd" "" { Text "G:/组成实验/1.1编码实验：Hamming码/hamming.vhd" 19 0 0 } }  } 0}
{ "Warning" "WVRFX_VHDL_ID_IN_COMB_PROCESS_HOLDS_VALUE" "s hamming.vhd(47) " "Warning: VHDL Process Statement warning at hamming.vhd(47): signal or variable \"s\" may not be assigned a new value in every possible path through the Process Statement. Signal or variable \"s\" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design." {  } { { "hamming.vhd" "" { Text "G:/组成实验/1.1编码实验：Hamming码/hamming.vhd" 47 0 0 } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 3 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Apr 10 23:13:42 2009 " "Info: Processing ended: Fri Apr 10 23:13:42 2009" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}