mcu8951.fit.eqn

此示例是8051核加频率计的联合设计,带有8051IP核资料

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--MB1_QALE is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|QALE at LCFF_X18_Y8_N19
MB1_QALE = DFFEAS(MB1L379, GLOBAL(G1L1), RST,  , CB1_LDV2CK2,  ,  ,  ,  );


--MB1_IDLE is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|IDLE at LCFF_X17_Y7_N3
MB1_IDLE = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(G1L1), RST,  ,  , PB1_L_PCON[0],  ,  , VCC);


--MB1_ALE is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|ALE at LCCOMB_X17_Y7_N2
MB1_ALE = MB1_IDLE # !MB1_QALE;


--F1_Q1[15] is CNT32B:inst10|Q1[15] at LCFF_X27_Y12_N31
F1_Q1[15] = DFFEAS(F1L48, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--F1_Q1[14] is CNT32B:inst10|Q1[14] at LCFF_X27_Y12_N29
F1_Q1[14] = DFFEAS(F1L45, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--F1_Q1[13] is CNT32B:inst10|Q1[13] at LCFF_X27_Y12_N27
F1_Q1[13] = DFFEAS(F1L42, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--F1_Q1[12] is CNT32B:inst10|Q1[12] at LCFF_X27_Y12_N25
F1_Q1[12] = DFFEAS(F1L39, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--F1_Q1[11] is CNT32B:inst10|Q1[11] at LCFF_X27_Y12_N23
F1_Q1[11] = DFFEAS(F1L36, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--F1_Q1[10] is CNT32B:inst10|Q1[10] at LCFF_X27_Y12_N21
F1_Q1[10] = DFFEAS(F1L33, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--MB1_PORT3_SFR[7] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[7] at LCFF_X15_Y5_N27
MB1_PORT3_SFR[7] = DFFEAS(MB1L371, GLOBAL(G1L1), RST,  , MB1L367,  ,  ,  ,  );


--MB1_NRD is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|NRD at LCFF_X17_Y10_N7
MB1_NRD = DFFEAS(MB1L159, GLOBAL(G1L1),  ,  , MB1L155,  ,  ,  ,  );


--MB1_OD[7] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[7] at LCCOMB_X15_Y5_N16
MB1_OD[7] = MB1_NRD & !MB1_PORT3_SFR[7];


--MB1_NWR is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|NWR at LCFF_X17_Y10_N17
MB1_NWR = DFFEAS(MB1L164, GLOBAL(G1L1),  ,  , MB1L155,  ,  ,  ,  );


--MB1_PORT3_SFR[6] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[6] at LCFF_X15_Y5_N11
MB1_PORT3_SFR[6] = DFFEAS(MB1L363, GLOBAL(G1L1), RST,  , MB1L367,  ,  ,  ,  );


--MB1_OD[6] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[6] at LCCOMB_X15_Y5_N24
MB1_OD[6] = MB1_NWR & !MB1_PORT3_SFR[6];


--RB1_TSEND is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|TSEND at LCFF_X21_Y4_N31
RB1_TSEND = DFFEAS(RB1L316, GLOBAL(G1L1),  ,  ,  ,  ,  , !K1_CLEAR,  );


--RB1_L_SCON[6] is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|L_SCON[6] at LCFF_X17_Y5_N17
RB1_L_SCON[6] = DFFEAS(RB1L143, GLOBAL(G1L1),  ,  , RB1L126,  ,  ,  ,  );


--RB1_L_SCON[7] is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|L_SCON[7] at LCFF_X20_Y5_N17
RB1_L_SCON[7] = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(G1L1),  ,  , RB1L126, RB1L144,  ,  , VCC);


--RB1L158 is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|MODE0~0 at LCCOMB_X21_Y4_N14
RB1L158 = RB1_L_SCON[6] # RB1_L_SCON[7];


--RB1_TXCLK is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|TXCLK at LCFF_X22_Y2_N5
RB1_TXCLK = DFFEAS(RB1L329, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--RB1_RCV is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|RCV at LCFF_X21_Y3_N23
RB1_RCV = DFFEAS(RB1L195, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--MB1L170 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[1]~285 at LCCOMB_X20_Y4_N6
MB1L170 = RB1L158 & !RB1_TSEND & !RB1_RCV # !RB1L158 & (RB1_TXCLK # !RB1_TSEND & !RB1_RCV);


--MB1_PORT3_SFR[1] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[1] at LCFF_X15_Y5_N19
MB1_PORT3_SFR[1] = DFFEAS(MB1L338, GLOBAL(G1L1), RST,  , MB1L367,  ,  ,  ,  );


--RB1_TXLASTBIT is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|TXLASTBIT at LCFF_X21_Y4_N27
RB1_TXLASTBIT = DFFEAS(RB1L351, GLOBAL(G1L1),  ,  , RB1L347,  ,  ,  ,  );


--JC1_DAT[0] is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|m3s030bo:U9|DAT[0] at LCFF_X24_Y5_N17
JC1_DAT[0] = DFFEAS(JC1L11, GLOBAL(G1L1),  ,  , JC1L7,  ,  , !K1_CLEAR,  );


--RB1_DATAEN is CPU8051C1:inst|MCU80512:inst3|m3s028bo:U15|DATAEN at LCFF_X21_Y4_N25
RB1_DATAEN = DFFEAS(RB1L30, GLOBAL(G1L1),  ,  ,  ,  ,  ,  ,  );


--MB1L173 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[1]~286 at LCCOMB_X20_Y4_N26
MB1L173 = RB1_TXLASTBIT # RB1_DATAEN & JC1_DAT[0] # !RB1_TSEND;


--MB1L176 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[1]~287 at LCCOMB_X20_Y4_N20
MB1L176 = !MB1_PORT3_SFR[1] & (MB1L170 # RB1L158 & MB1L173);


--MB1_PORT3_SFR[0] is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|PORT3_SFR[0] at LCFF_X15_Y5_N1
MB1_PORT3_SFR[0] = DFFEAS(MB1L333, GLOBAL(G1L1), RST,  , MB1L367,  ,  ,  ,  );


--MB1L167 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|OD[0]~288 at LCCOMB_X20_Y4_N8
MB1L167 = !MB1_PORT3_SFR[0] & (RB1L158 # JC1_DAT[0] # !RB1_TSEND);


--V1_dffs[9] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[9] at LCFF_X7_Y1_N13
V1_dffs[9] = DFFEAS(V1L50, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--V1_dffs[6] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[6] at LCFF_X7_Y1_N23
V1_dffs[6] = DFFEAS(V1L35, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--V1_dffs[3] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[3] at LCFF_X7_Y1_N11
V1_dffs[3] = DFFEAS(V1L20, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--U1L1 is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|XOR3:inst33|1~13 at LCCOMB_X7_Y1_N16
U1L1 = V1_dffs[9] $ V1_dffs[6] $ V1_dffs[3];


--B1_inst19 is CPU8051C1:inst|inst19 at LCFF_X6_Y3_N23
B1_inst19 = DFFEAS(UNCONNECTED_DATAIN, B1_inst9,  ,  ,  , B1L24,  ,  , VCC);


--J2_inst10 is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|inst10 at LCFF_X7_Y3_N25
J2_inst10 = DFFEAS(J2L8, AB1_modulus_trigger, !N1_inst,  ,  ,  ,  ,  ,  );


--J2L9 is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|inst15~8 at LCCOMB_X6_Y3_N22
J2L9 = B1_inst19 & !J2_inst10;


--V1_dffs[1] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[1] at LCFF_X9_Y2_N9
V1_dffs[1] = DFFEAS(V1L10, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--V1_dffs[4] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[4] at LCFF_X7_Y1_N1
V1_dffs[4] = DFFEAS(V1L25, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--V1_dffs[8] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[8] at LCFF_X7_Y1_N27
V1_dffs[8] = DFFEAS(V1L45, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--U2_1 is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|XOR3:inst34|1 at LCCOMB_X7_Y1_N20
U2_1 = V1_dffs[1] $ V1_dffs[4] $ V1_dffs[8];


--V1_dffs[23] is CPU8051C1:inst|FPGA1C:inst|FPGA1C:inst1|lpm_shiftreg32:inst|lpm_shiftreg:lpm_shiftreg_component|dffs[23] at LCFF_X9_Y2_N13
V1_dffs[23] = DFFEAS(V1L120, GLOBAL(J2L12),  ,  ,  ,  ,  ,  ,  );


--A1L7 is altera_internal_jtag~TDO at JTAG_X1_Y7_N0
A1L7 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , H1L20);

--A1L8 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y7_N0
A1L8 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , H1L20);

--A1L5 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y7_N0
A1L5 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , H1L20);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y7_N0
altera_internal_jtag = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , H1L20);


--VC1__clk1 is PLL200:inst7|altpll:altpll_component|_clk1 at PLL_1
VC1__clk1 = PLL.CLK1(.ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .INCLK(CLK), .INCLK());


--K1_CLEAR is CPU8051C1:inst|MCU80512:inst3|CLEAR at LCFF_X22_Y3_N5
K1_CLEAR = DFFEAS(K1L4, GLOBAL(G1L1), RST,  ,  ,  ,  ,  ,  );


--CB1_STATD[5] is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|STATD[5] at LCFF_X22_Y6_N25
CB1_STATD[5] = DFFEAS(UNCONNECTED_DATAIN, GLOBAL(G1L1), RST,  , CB1L62, CB1_SMD,  ,  , VCC);


--MB1L375 is CPU8051C1:inst|MCU80512:inst3|m3s018bo:U10|QALE~78 at LCCOMB_X18_Y8_N4
MB1L375 = !CB1_STATD[5] & !K1_CLEAR;


--QB1_OPC[0] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[0] at LCFF_X18_Y10_N13
QB1_OPC[0] = DFFEAS(QB1L16, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );


--QB1_OPC[1] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[1] at LCFF_X18_Y10_N25
QB1_OPC[1] = DFFEAS(QB1L21, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );


--QB1_OPC[2] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[2] at LCFF_X18_Y10_N21
QB1_OPC[2] = DFFEAS(QB1L26, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );


--QB1_OPC[3] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[3] at LCFF_X18_Y10_N31
QB1_OPC[3] = DFFEAS(QB1L31, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );


--UB1L46 is CPU8051C1:inst|MCU80512:inst3|m3s004bo:U3|m3s022bo:U1|LODEC~1 at LCCOMB_X17_Y10_N24
UB1L46 = QB1_OPC[1] # QB1_OPC[2] # QB1_OPC[3] # QB1_OPC[0];


--CB1_Q4 is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|Q4 at LCFF_X17_Y7_N31
CB1_Q4 = DFFEAS(CB1L29, GLOBAL(G1L1), RST,  , CB1L95,  ,  ,  ,  );


--CB1_Q5 is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|Q5 at LCFF_X17_Y7_N15
CB1_Q5 = DFFEAS(CB1L34, GLOBAL(G1L1), RST,  , CB1L95,  ,  ,  ,  );


--CB1_CYC[2] is CPU8051C1:inst|MCU80512:inst3|m3s001bo:U1|CYC[2] at LCCOMB_X21_Y9_N6
CB1_CYC[2] = !CB1_Q5 & CB1_Q4;


--EB1L4 is CPU8051C1:inst|MCU80512:inst3|m3s004bo:U3|AJ~38 at LCCOMB_X18_Y10_N10
EB1L4 = QB1_OPC[1] & !QB1_OPC[2] & !QB1_OPC[3];


--QB1_OPC[5] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[5] at LCFF_X18_Y13_N29
QB1_OPC[5] = DFFEAS(QB1L41, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );


--QB1_OPC[6] is CPU8051C1:inst|MCU80512:inst3|m3s025bo:U14|OPC[6] at LCFF_X18_Y13_N5
QB1_OPC[6] = DFFEAS(QB1L48, GLOBAL(G1L1), RST,  , QB1L54,  ,  ,  ,  );